ASAHI KASEI
[AK4348]
PIN/FUNCTION
Function
Master Clock Input
An external TTL clock should be input on this pin.
2
BICK
I
Audio Serial Data Clock
3
SDTI1
I
DAC1 Audio Serial Data Input
4
LRCK
I
L/R Clock
5
RSTB
I
Reset Mode
When at “L”, the AK4348 is in reset mode.
The AK4348 must be reset once upon power-up.
6
SMUTE
I
Soft Mute in parallel control mode
“H”: Enable, “L”: Disable
CSN
I
Chip Select in serial 3-wire mode
CAD0
I
Chip Address in serial I2C mode
7
ACKS
I
Auto Setting Mode in parallel control mode
“L”: Manual Setting Mode, “H”: Auto Setting Mode
CCLK
I
Control Data Clock in serial 3-wire control mode
SCL
Control Data Clock in serial I2C control mode
8
DIF0
I
Audio Data Interface Format in parallel control mode
CDTI
I
Control Data Input in serial 3-wire control mode
SDA
I/O
Control Data in serial I2C control mode
9
SDTI2
I
DAC2 Audio Serial Data Input
10
SDTI3
I
DAC3 Audio Serial Data Input
11
SDTI4
I
DAC4 Audio Serial Data Input
12
DIF1
I
Audio Data Interface Format
13
CAD1
I
Chip Address in serial control mode
DEM0
I
De-emphasis Filter Enable
14
DVDD
Digital Power Supply, +2.7
∼
+3.6V
15
DVSS
Digital Ground
16
I2C
I
µP
I/F Mode Select in serial control mode
“L”: 3-wire Serial, “H”: I
2
C Bus
DEM1
I
De-emphasis Filter Enable in parallel control mode
17
ROUT4
O
DAC4 Right Channel Analog Output
18
LOUT4
O
DAC4 Left Channel Analog Output
19
ROUT3
O
DAC3 Right Channel Analog Output
20
LOUT3
O
DAC3 Left Channel Analog Output
21
ROUT2
O
DAC2 Right Channel Analog Output
22
LOUT2
O
DAC2 Left Channel Analog Output
23
P/S
I
Parallel/Serial Control Mode Select
(Internal pull-up pin)
“L”: Serial control mode, “H”: Parallel control mode
24
ROUT1
O
DAC1 Right Channel Analog Output
25
LOUT1
O
DAC1 Left Channel Analog Output
26
VCOM
O
Common Voltage, AVDD/2
Normally connected to AVSS with a 0.1µF ceramic capacitor in parallel with a
10µF electrolytic cap.
27
AVSS
-
Analog Ground
28
AVDD
-
Analog Power Supply, +2.7∼+3.6V
29
TDM0
I
TDM I/F Format Mode in parallel control mode (Internal pull-down pin)
“L”: Normal mode, “H”: TDM 256 mode
DZF2
O
Data Zero Input Detect in serial control mode
30
DZF1
O
Data Zero Input Detect
Note: All input pins except P/S and TDM0 pins should not be left floating.
No.
1
Pin Name
MCLK
I/O
I
MS0532-E-00
-3-
2006/07
AKM [ ASAHI KASEI MICROSYSTEMS ]
