[AK4373]
AVDD VSS1
VCOM
DVDD
VSS3
I2C
CAD0/CSN
Control
Register
SCL/CCLK
SDA/CDTI
Headphone(Lch)
HPL+
HPL-
PMHPL
HPG
VOL
DACH
PMDAC
Digital
Processing
- HPF
PDN
BICK
Audio
I/F
LRCK
SDTI
HPR+
HPR-
Headphone(Rch)
MUTET
PMHPR
D/A
HPG
VOL
DACH
DATT
- LPF
SMUTE
- 3D Enhance
- Frequency
Compensation
- 5-BiQuads
- ALC/Limiter
MCKO
PLL
MINH
MIN+
PMPLL
MCKI
VCOC
Mono In
MIN-
PMMIN
HVDD VSS2
Figure 2. Block Diagram (Differential mode, HPBTL bit = “1”, PSEUDO bit = “0”)
AVDD VSS1
DVDD
VSS3
VCOM
I2C
CAD0/CSN
Control
Register
SCL/CCLK
SDA/CDTI
PMHPL
HPG
VOL
PMHPR
HPG
VOL
DACH
PMDAC
PDN
Digital
Processing
- HPF
HPL
Headphone
HPR
MUTET
BICK
Audio
I/F
LRCK
SDTI
D/A
DACH
DATT
- LPF
SMUTE
- 3D Enhance
- Frequency
Compensation
- 5-BiQuads
- ALC/Limiter
MCKO
PLL
PMPLL
MCKI
VCOC
PMHPL or PMHPR
HVCM
COMMON
TEST
MINH
MIN+
Mono In
MIN-
PMMIN
HVDD VSS2
Figure 3. Block Diagram (Pseudo cap-less mode, HPBTL bit = “0”, PSEUDO bit = “1”)
MS0991-E-00
-3-
2008/09
AKM [ ASAHI KASEI MICROSYSTEMS ]
