ASAHI KASEI
[AK5358]
SWITCHING CHARACTERISTICS
(Ta=-20°C
∼
85°C; VA=4.5
∼
5.5V; VD=2.7
∼
3.6V; C
L
=20pF)
Parameter
Symbol
min
Master Clock Timing
512fs, 256fs Frequency
fCLK
2.048
Pulse Width Low
tCLKL
16
Pulse Width High
tCLKH
16
768fs, 384fs Frequency
fCLK
3.072
Pulse Width Low
tCLKL
10.5
Pulse Width High
tCLKH
10.5
LRCK Frequency
fs
8
Duty Cycle
Slave mode
45
Master mode
Audio Interface Timing
Slave mode
tSCK
SCLK Period
160
tSCKL
SCLK Pulse Width Low
65
tSCKH
Pulse Width High
65
tLRSH
LRCK Edge to SCLK “↑”
(Note 10)
30
tSHLR
SCLK “↑” to LRCK Edge
(Note 10)
30
2
tLRS
LRCK to SDTO (MSB) (Except I S mode)
SCLK “↓” to SDTO
tSSD
Master mode
SCLK Frequency
fSCK
SCLK Duty
dSCK
SCLK “↓” to LRCK
tMSLR
−20
SCLK “↓” to SDTO
tSSD
−20
Reset Timing
tPD
PDN Pulse Width
(Note 11)
150
tPDV
PDN “↑” to SDTO valid at Slave Mode (Note 12)
tPDV
PDN “↑” to SDTO valid at Master Mode (Note 12)
Note 10. SCLK rising edge must not occur at the same time as LRCK edge.
Note 11. The AK5358 can be reset by bringing the PDN pin = “L”.
Note 12. This cycle is the number of LRCK rising edges from the PDN pin = “H”.
typ
max
24.576
Units
MHz
ns
ns
MHz
ns
ns
kHz
%
%
36.864
96
55
50
35
35
64fs
50
20
35
ns
ns
ns
ns
ns
ns
ns
Hz
%
ns
ns
ns
1/fs
1/fs
4132
4129
MS0438-E-00
-8-
2005/11
AKM [ ASAHI KASEI MICROSYSTEMS ]
