ASAHI KASEI
[AK5371A]
Digital DC Characteristics
Ta=0 - 70°C; VD=3.0 - 3.6V; VSS1=0V Measurement under static state
All digital pins except DP, DN. Schmitt hysteresis level of RST pin and levels of all test pins will not be tested
.
Parameter
EPDI, EPEN, EPSEL, pin “H” level input voltage
EPDI, EPEN, EPSEL pin “L” level input voltage
RSTN pin “H” level voltage
RSTN pin “L” level voltage
CS, SK, EPAO, SUSN pin “H” level output
voltage
IOH = 2mA
CS, SK, EPAO, SUSN pin “L” level output
voltage
IOL = -2mA
Input Leakage Current
Symbol
VIH
VIL
VIHR
VILR
VOH
VOL
Iin
Min
70%VD
2.0
Typ
Max
30%VD
0.8
2.4
0.6
±10
Units
V
V
V
V
V
V
μA
Switching Characteristics
Ta=25°C, VA=VD=3.3V
Parameter
Symbol
Min
Typ
Max
Master Clock Frequency
MCLK
-
11.2896
-
Reset input width @RSTN pin(low active)
Wrst
1.0
DP,DN Single Ended Receiver Threshold
for H level
VseH
2.0
for L level
VseL
0.8
Time Width for USB Reset Signal Recognition*1
Trst_rec
2.7
DP<VseL & DN< VseL to USB Reset mode
Device Ready Time from USB Reset
Tdrr
10
Ready for transaction after reset
Time Width for Suspend Recognition
Tsus_rec
3.0
Idle state ( DP > VseL & DN < VseL )
to Suspend mode
Resume Time from Suspend
First flip of DP/DN from Idle sate
Tresm
30
To Device Ready*)
Device Ready: VREF, X’tal oscillator, and PLL get stable and bus transaction with normal rate is ready.
min 20ms
resume time
min 10ms
resume recovery time
Units
MHz
us
V
μs
ms
ms
ms
VD
DP
DN
RSTN
PLL
Clock
Resume
Tdrr
Reset Mode
Trst_rec
Device
Connected
Figure 1. Mode change with respect to BUS States 1 (Power on and device connected)
MS0546-E-00
MS0103-E-00
2007/02
7
AKM [ ASAHI KASEI MICROSYSTEMS ]
