ASAHI KASEI
[AK5386]
SWITCHING CHARACTERISTICS (Double / Quad Speed)
(Ta=−40
∼
85°C; VA=4. 5
∼
5.5V; VD=3.0
∼
3.6V; C
L
=20pF)
Parameter
Symbol
min
typ
Master Clock Timing
Frequency: 128fs, 256fs
fCLK
13.824
-
192fs, 384fs
fCLK
18.432
-
Pulse Width Low
tCLKL
0.4/fCLK
-
Pulse Width High
tCLKH
0.4/fCLK
-
LRCK
Double Speed:256fs
fs
54
-
Frequency:
384fs
fs
48
-
Quad Speed: 128fs
fs
108
-
192fs
fs
96
-
Duty Cycle
Slave mode
45
-
Master mode
-
50
Audio Interface Timing
Slave mode
tSCK
1/128fs
-
SCLK Period: Double Speed
tSCK
1/64fs
-
Quad Speed
tSCKL
33
-
SCLK Pulse Width Low
tSCKH
33
-
Pulse Width High
tLRSH
20
-
LRCK Edge to SCLK “
↑
”
(Note 10)
tSHLR
20
-
SCLK “↑” to LRCK Edge
(Note 10)
tLRS
-
-
LRCK to SDTO (MSB) (Except I
2
S mode)
SCLK “↓” to SDTO
tSSD
-
-
Master mode
64fs
SCLK Frequency
fSCK
-
50
SCLK Duty
dSCK
-
-
SCLK “↓” to LRCK
tMSLR
−20
-
SCLK “
↓
” to SDTO
tSSD
−
20
Reset Timing
tPD
PDN Pulse Width
(Note 11)
150
tPDV
PDN “↑” to SDTO valid at Slave Mode (Note 12)
-
tPDV
PDN “↑” to SDTO valid at Master Mode (Note 12)
-
Note 10. SCLK rising edge must not occur at the same time as LRCK edge.
Note 11. The AK5386 can be reset by bringing the PDN pin = “L”
Note 12. This cycle is the number of LRCK rising edges from the PDN pin = “H”.
-
4132
4129
max
27.648
36.864
-
-
108
96
216
192
55
-
Units
MHz
MHz
ns
ns
kHz
kHz
kHz
kHz
%
%
-
-
-
-
-
-
20
20
-
-
20
20
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
Hz
%
ns
ns
ns
1/fs
1/fs
MS0579-E-00
-9-
2006/12
AKM [ ASAHI KASEI MICROSYSTEMS ]
