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ALD1103SBL 参数 Datasheet PDF下载

ALD1103SBL图片预览
型号: ALD1103SBL
PDF下载: 下载PDF文件 查看货源
内容描述: 双N沟道和双P沟道MOSFET MATCHED PAIR [DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED MOSFET PAIR]
分类和应用:
文件页数/大小: 9 页 / 101 K
品牌: ALD [ ADVANCED LINEAR DEVICES ]
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A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD1103
DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED MOSFET PAIR
GENERAL DESCRIPTION
The ALD1103 is a monolithic dual N-channel and dual P-channel matched
transistor pair intended for a broad range of analog applications. These
enhancement-mode transistors are manufactured with Advanced Linear
Devices' enhanced ACMOS silicon gate CMOS process. It consists of an
ALD1101 N-channel MOSFET pair and an ALD1102 P-channel MOSFET
pair in one package.
The ALD1103 offers high input impedance and negative current temperature
coefficient. The transistor pair is matched for minimum offset voltage and
differential thermal response, and it is designed for precision signal
switching and amplifying applications in +2V to +12V systems where low
input bias current, low input capacitance and fast switching speed are
desired. Since these are MOSFET devices, they feature very large (almost
infinite) current gain in a low frequency, or near DC, operating environment.
When used in pairs, a dual CMOS analog switch can be constructed. In
addition, the ALD1103 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications.
The ALD1103 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specified at 50pA at room temperature. For example, DC beta of the device
at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.
FEATURES
• Thermal tracking between N-channel and P-channel pairs
• Low threshold voltage of 0.7V for both N-channel &
P-channel MOSFETS
• Low input capacitance
• Low Vos -- 10mV
• High input impedance -- 10
13
typical
• Low input and output leakage currents
• Negative current (I
DS
) temperature coefficient
• Enhancement mode (normally off)
• DC current gain 10
9
• Matched N-channel and matched P-channel in one package
• RoHS compliant
APPLICATIONS
Precision current mirrors
Complementary push-pull linear drives
Analog switches
Choppers
Differential amplifier input stage
Voltage comparator
Data converters
Sample and Hold
Analog inverter
Precision matched current sources
PIN CONFIGURATION
DN1
GN1
SN1
V
-
DP1
GP1
SP1
1
2
3
4
5
6
7
TOP VIEW
SBL, PBL, DB PACKAGES
14
13
12
11
10
9
8
DN2
GN2
SN2
V
+
DP2
GP2
SP2
BLOCK DIAGRAM
N GATE 1 (2)
N DRAIN 1 (1)
N SOURCE 1 (3)
SUBSTRATE (4)
N DRAIN 2 (14)
N SOURCE 2 (12)
N GATE 2 (13)
ORDERING INFORMATION
(“L” suffix denotes lead-free (RoHS))
Operating Temperature Range*
0°C to +70°C
14-Pin
Small Outline
Package (SOIC)
ALD1103SBL
0°C to +70°C
14-Pin
Plastic Dip
Package
ALD1103PBL
-55°C to +125°C
14-Pin
CERDIP
Package
ALD1103DB
P DRAIN 1 (5)
P GATE 1 (6)
P SOURCE 1 (7)
SUBSTRATE (11)
P DRAIN 2 (10)
P SOURCE 2 (8)
* Contact factory for leaded (non-RoHS) or high temperature versions.
P GATE 2 (9)
Rev 2.0 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com