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ALD1117 参数 Datasheet PDF下载

ALD1117图片预览
型号: ALD1117
PDF下载: 下载PDF文件 查看货源
内容描述: 双N沟道和双P沟道匹配的一对MOSFET [DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED PAIR MOSFET]
分类和应用:
文件页数/大小: 6 页 / 56 K
品牌: ALD [ ADVANCED LINEAR DEVICES ]
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A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD1105
DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED PAIR MOSFET
GENERAL DESCRIPTION
The ALD1105 is a monolithic dual N-channel and dual P-channel
complementary matched transistor pair intended for a broad range of
analog applications. These enhancement-mode transistors are
manufactured with Advanced Linear Devices' enhanced ACMOS silicon
gate CMOS process. It consists of an ALD1116 N-channel MOSFET pair
and an ALD1117 P-channel MOSFET pair in one package. The ALD1105
is a low drain current, low leakage current version of the ALD1103.
The ALD1105 offers high input impedance and negative current temperature
coefficient. The transistor pair is matched for minimum offset voltage and
differential thermal response, and it is designed for precision signal
switching and amplifying applications in +1V to +12V systems where low
input bias current, low input capacitance and fast switching speed are
desired. Since these are MOSFET devices, they feature very large (almost
infinite) current gain in a low frequency, or near DC, operating environment.
When used in complementary pairs, a dual CMOS analog switch can be
constructed. In addition, the ALD1105 is intended as a building block for
differential amplifier input stages, transmission gates, and multiplexer
applications.
The ALD1105 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the field effect
transistors result in extremely low current loss through the control gate. The
DC current gain is limited by the gate input leakage current, which is
specified at 30pA at room temperature. For example, DC beta of the device
at a drain current of 3mA at 25°C is = 3mA/30pA = 100,000,000.
FEATURES
• Thermal tracking between N-channel and P-channel pairs
• Low threshold voltage of 0.7V for both N-channel &
P-channel MOSFETs
• Low input capacitance
• Low Vos -- 10mV
• High input impedance -- 10
13
typical
• Low input and output leakage currents
• Negative current (I
DS
) temperature coefficient
• Enhancement mode (normally off)
• DC current gain 10
9
• Matched N-channel pair and matched P-channel pair in one package
APPLICATIONS
Precision current mirrors
Complementary push-pull linear drives
Discrete Analog switches
Analog signal Choppers
Differential amplifier input stage
Voltage comparator
Data converters
Sample and Hold
Analog current inverter
Precision matched current sources
PIN CONFIGURATION
DN1
GN1
SN1
V
-
DP1
GP1
SP1
1
2
3
4
5
6
7
DB, PB, SB PACKAGE
14
13
12
11
10
9
8
DN2
GN2
SN2
V
+
DP2
GP2
SP2
BLOCK DIAGRAM
N GATE 1 (2)
N DRAIN 1 (1)
N SOURCE 1 (3)
SUBSTRATE (4)
N DRAIN 2 (14)
N SOURCE 2 (12)
N GATE 2 (13)
ORDERING INFORMATION
Operating Temperature Range*
-55°C to +125°C
0°C to +70°C
0°C to +70°C
14-Pin
CERDIP
Package
ALD1105 DB
14-Pin
Plastic Dip
Package
ALD1105 PB
14-Pin
SOIC
Package
ALD1105 SB
P GATE 1 (6)
P DRAIN 1 (5)
P SOURCE 1 (7)
SUBSTRATE (11)
P DRAIN 2 (10)
P SOURCE 2 (8)
* Contact factory for industrial temperature range.
P GATE 2 (9)
© 2005 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com