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6818 参数 Datasheet PDF下载

6818图片预览
型号: 6818
PDF下载: 下载PDF文件 查看货源
内容描述: DABiC -IV 32位串行输入,锁存源极驱动器 [DABiC-IV, 32-BIT SERIAL-INPUT, LATCHED SOURCE DRIVER]
分类和应用: 驱动器输入元件
文件页数/大小: 7 页 / 120 K
品牌: ALLEGRO [ ALLEGRO MICROSYSTEMS ]
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6818
A6818xEP
DABiC-IV, 32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
The A6818– devices combine a 32-bit CMOS shift register, accompanying
data latches and control circuitry with bipolar sourcing outputs and pnp active pull
downs. Designed primarily to drive vacuum-fluorescent displays, the 60 V and -
40 mA output ratings also allow these devices to be used in many other peripheral
power driver applications. The A6818– features an increased data input rate
(compared with the older UCN/UCQ5818–F) and a controlled output slew rate.
The CMOS shift register and latches allow direct interfacing with micro-
processor-based systems. With a 3.3 V or 5 V logic supply, typical serial-data
input rates are up to 33 MHz.
A CMOS serial data output permits cascade connections in applications
requiring additional drive lines. Similar devices are available as the A6810–
(10 bits) and A6812– (20 bits).
The A6818– output source drivers are npn Darlingtons, capable of
sourcing up to 40 mA. The controlled output slew rate reduces electromag-
netic noise, which is an important consideration in systems that include
telecommunications and/or microprocessors and to meet government emis-
sions regulations. For inter-digit blanking, all output drivers can be disabled
and all sink drivers turned on with a BLANKING input high. The pnp active
pull-downs will sink at least 2.5 mA.
Three temperature ranges are available for optimum performance in
commercial (suffix S-), industrial (E-), and extended industrial (K-) applica-
tions. The package style provided is the minimum-area surface-mount PLCC
(suffix -EP). Copper lead frames, low logic-power dissipation, and low
output-saturation voltages allow these devices to drive most multiplexed
vacuum-fluorescent displays over the maximum operating temperature range.
The lead (Pb) free versions have 100% matte tin leadframe plating.
Data Sheet
26182.128D
44
43
42
41
7
8
9
10
11
12
13
14
15
16
17
21
22
23
24
25
26
27
18
19
20
28
40
6
5
4
3
2
1
39
38
37
36
35
34
33
32
31
30
29
ABSOLUTE MAXIMUM RATINGS
at T
A
= 25°C
Logic Supply Voltage, V
DD
..................
7.0 V
Driver Supply Voltage, V
BB
...................
60 V
Continuous Output Current Range,
I
OUT
.........................
-40 mA to +15 mA
Input Voltage Range,
V
IN
.......................
-0.3 V to V
DD
+ 0.3 V
Package Power Dissipation,
P
D
........................................
See Graph
Operating Temperature Range, T
A
(Suffix ‘E–’) ..................
-40°C to +85°C
(Suffix ‘K–’) ................
-40°C to +125°C
(Suffix ‘S–’) ..................
-20°C to +85°C
Storage Temperature Range,
T
S
...............................
-55°C to +125°C
Caution: These CMOS devices have input
static protection (Class 2) but are still
susceptible to damage if exposed to
extremely high static electrical charges.
FEATURES
Controlled Output Slew Rate
High-Speed Data Storage
60 V Minimum
High Data Input Rate
Output Breakdown
Low Output-Saturation Voltages
PNP Active Pull-Downs
Improved Replacements
Low-Power CMOS Logic
for SN75518N, SN75518NF,
and Latches
UCN5818–, and UCQ5818–
Always order by complete part number:
Part Number
A6818EEP
A6818EEP-T
A6818EEPTR
A6818EEPTR-T
A6818KEP
A6818KEP-T
A6818KEPTR
A6818KEPTR-T
A6818SEP
A6818SEP-T
A6818SEPTR
A6818SEPTR-T
Pb-free
Yes
Yes
Yes
Yes
Yes
Yes
Packing
27 pieces/tube
–40 to 85
450 pieces/13-in. reel
27 pieces/tube
–40 to 125
450 pieces/13-in. reel
27 pieces/tube
–20 to 85
450 pieces/13-in. reel
Ambient Temperature, T
A
(°C)