A1201, A1202, A1203, and A1204
Continuous-Time Bipolar Switch Family
the field is reduced beyond the B
OP
level, the device switches
back to the low state.
The typical output behavior of the A120x devices is latching.
That is, switching to the low state when the magnetic field at
the Hall sensor exceeds the operate point threshold, B
OP
. At this
point, the output voltage is V
OUT(SAT)
. When the magnetic field
is reduced to below the release point threshold, B
RP
, the device
output, V
OUT
, goes high. The values of the magnetic parameters
are specified in the Magnetic Characteristics table, on page 3.
Note that, as shown in figure 1, these switchpoints can lie in
either north or south polarity ranges.
The A120x family is designed to attain a small hysteresis, and
thereby provide more sensitive switching. Although this means
that true latching behavior cannot be guaranteed in all cases,
proper switching can be ensured by use of both south and north
magnetic fields, as in a ring magnet. The hysteresis of the A120x
family allows clean switching of the output, even in the presence
of external mechanical vibration and electrical noise.
Bipolar devices adopt an indeterminate output state when pow-
ered-on in the absence of a magnetic field or in a field that lies
within the hysteresis band of the device.
For more information on Bipolar switches, refer to Application
Note 27705,
Understanding Bipolar Hall Effect Sensors.
CONTINUOUS-TIME BENEFITS
Continuous-time devices, such as the A120x family, offer the
fastest available power-on settling time and frequency response.
Due to offsets generated during the IC packaging process,
continuous-time devices typically require programming after
packaging to tighten magnetic parameter distributions. In con-
trast, chopper-stabilized switches employ an offset cancellation
technique on the chip that eliminates these offsets without the
need for after-packaging programming. The tradeoff is a longer
settling time and reduced frequency response as a result of the
chopper-stabilization offset cancellation algorithm.
1
2
3
4
5
V
CC
t
V
OUT
t
Output Sampled
t
PO(max)
Figure 2. Continuous-Time Application, B < B
RP
.. This figure illustrates the use of a quick cycle for chopping V
CC
in order to conserve battery power.
Position 1, power is applied to the device. Position 2, the output assumes the correct state at a time prior to the maximum Power-On Time, t
PO(max)
.
The case shown is where the correct output state is HIGH . Position 3, t
PO(max)
has elapsed. The device output is valid. Position 4, after the output is
valid, a control unit reads the output. Position 5, power is removed from the device.
A1201-DS, Rev. 2
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
9
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