A3955
Full-Bridge PWM Microstepping Motor Driver
With increasing values of t
OFF,
switching losses will decrease,
low-level load-current regulation will improve, EMI will be
reduced, the PWM frequency will decrease, and ripple current
will increase. A value of t
OFF
can be chosen for optimization
of these parameters. For applications where audible noise is a
concern, typical values of t
OFF
are chosen to be in the range of
15 to 35
μs.
Mixed Current-Decay Mode
.
If V
PFD
is between 1.1 V
and 3.1 V, the device will be in a mixed current-decay mode.
Mixed-decay mode allows the user to achieve good current
regulation with a minimum amount of ripple current and
motor/driver losses by selecting the minimum percentage of fast
decay required for their application (see also the Stepper Motor
Applications section).
As in fast current-decay mode, mixed-decay starts with the sink
and source drivers disabled after the load current reaches I
TRIP
.
When the voltage at the RC terminal decays to a value below
V
PFD
, the sink drivers are re-enabled, placing the device in slow
current-decay mode for the remainder of the
fi
xed off-time
(figure 2). The percentage of fast decay (PFD) is user determined
by V
PFD
or two external resistors.
PFD = 100 ln (0.6[R
1
+R
2
]/R
2
)
where:
V
CC
R1
PFD
R2
RC Blanking.
In addition to determining the
fi
xed off-time of
the PWM control circuit, the C
T
component sets the comparator
blanking time. This function blanks the output of the current-
sense comparator when the outputs are switched by the internal
current-control circuitry (or by the PHASE input, or when the
device is enabled with the DAC data inputs). The comparator
output is blanked to prevent false over-current detections due to
reverse recovery currents of the clamp diodes, and/or switching
transients related to distributed capacitance in the load.
During internal PWM operation, at the end of the t
OFF
time, the
comparator’s output is blanked and C
T
begins to be charged
from approximately 0.22V
CC
by an internal current source of
approximately 1 mA. The comparator output remains blanked
until the voltage on C
T
reaches approximately 0.6V
CC
. The
blanking time, t
BLANK
, can be calculated as:
t
BLANK
= R
T
C
T
ln (R
T
/[R
T
– 3 kΩ]).
When a transition of the PHASE input occurs, C
T
is discharged
to near ground during the crossover delay time (the crossover
delay time is present to prevent simultaneous conduction of
the source and sink drivers). After the crossover delay, C
T
is
charged by an internal current source of approximately 1 mA.
The comparator output remains blanked until the voltage on C
T
reaches approximately 0.6V
CC
.
Similarly, when the device is disabled, via the DAC data inputs,
C
T
is discharged to near ground. When the device is re-enabled,
C
T
is charged by an internal current source of approximately 1
mA. The comparator output remains blanked until the voltage on
C
T
reaches approximately 0.6V
CC
. The blanking time, t
BLANK
,
can be calculated as:
t
BLANK
= R
T
C
T
ln ([R
T
- 1.1 kΩ]/R
T
- 3 kΩ).
The minimum recommended value for C
T
is 470 pF ± 5 %.
This value ensures that the blanking time is sufficient to avoid
false trips of the comparator under normal operating conditions.
For optimal regulation of the load current, this value for C
T
is
recommended and the value of R
T
can be sized to determine t
OFF
.
D
EP 062
Fixed Off-Time.
The internal PWM current-control circuitry
uses a one shot to control the time the driver(s) remain(s) off.
The one-shot off-time, t
OFF
, is determined by the selection of
an external resistor (R
T
) and capacitor (C
T
) connected from the
RC timing terminal to ground. The off-time, over a range of
values of C
T
= 470 pF to 1500 pF and R
T
= 12 kΩ to 100 kΩ, is
approximated by:
t
OFF
≈
R
T
C
T
.
When the load current is increasing, but has not yet reached the
sense-current comparator threshold (I
TRIP
), the voltage on the
RC terminal is approximately 0.6V
CC
. When I
TRIP
is reached,
the PWM latch is reset by the current-sense comparator and
the voltage on the RC terminal will decay until it reaches
approximately 0.22V
CC
. The PWM latch is then set, thereby
re-enabling the driver(s) and allowing load current to increase
again. The PWM cycle repeats, maintaining the peak load
current at the desired value.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
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