3964
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
A3964SB
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
5
R
θJT
= 6.0°C/W
NO
CONNECT.
OUT
1B
SENSE
1
1
2
3
4
5
6
7
8
9
9
NC
NC
24
23
NO
CONNECT.
OUT
2B
SENSE
2
OUT
2A
LOGIC
SUPPLY
GROUND
GROUND
V
REF(OUT)
RC
2
PHASE
2
ENABLE
2
NO
CONNECT.
4
1
2
22
21
3
SUFFIX 'B', R
θJA
= 40°C/W
OUT
1A
LOAD
SUPPLY
GROUND
GROUND
V
BB
V
CC
20
19
18
17
2
1
SUFFIX 'LB', R
θJA
= 60°C/W
V
REF(IN)
RC
1
PWM 2
16
θ
2
15
14
0
25
50
75
100
TEMPERATURE IN
°C
125
150
Dwg. GP-049-4
PHASE
1
ENABLE
1
NO
CONNECT.
10
11
12
θ
1
PWM 1
NC
NC
13
Dwg. PP-005-2
FUNCTIONAL BLOCK DIAGRAM
(A3964SLB pinning shown)
LOGIC
SUPPLY
OUT 1B
LOAD
SUPPLY
OUT 2A
OUT 1A
OUT 2B
17
V
CC
3
1
4
18
20
UVLO
& TSD
V
BB
PWM 1
1
2
ENABLE1
10
PWM 2
PHASE 1
9
12
PHASE 2
11
ENABLE2
SOURCE
DISABLE
–
+
2.5 V
REFERENCE
V
REF(IN)
–
+
SOURCE
DISABLE
ONE SHOT
ONE SHOT
REF OUT
SENSE 1
SENSE 2
RC1
RT
CT
RA
RS
RB
RS
RC2
8
2
14
REF IN
7
5 6 15 16
19
13
CT
RT
Dwg. FP-033-1
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 1997 Allegro MicroSystems, Inc.
ALLEGRO [ ALLEGRO MICROSYSTEMS ]
