Automotive DMOS Microstepping Driver
with Translator
A3980
While the fault persists, the A3980 continues this cycle at
each step command: enabling the outputs for a short period,
its limiting speed. To confirm an open load condition when
a low load current is flagged, the step rate should be reduced
to a level below half the maximum step rate. If the low
load current flag remains active at the lower step rate, after
completing the number of steps required to pass the home
condition, then an open circuit condition is confirmed.
and then disabling the outputs. This allows the A3980 to
handle a continuous short circuit without damage. If, while
stepping rapidly, a short circuit appears and no action is
taken, the repeated short-circuit current pulses eventually
cause the temperature of the A3980 to rise and an overtem-
perature fault occurs.
To allow immediate detection of an open load condition
at power up or after coming out of sleep mode, the A3980
translator is reset to the Home microstep position and the
low load current fault flags are set. If no open load condition
exists then the fault flags will be reset on the next rising edge
of the STEP input.
Low Load Current Fault Operation. A low load current
is detected by monitoring the measured phase current in
each output while driving the motor in the Home microstep
position. At the Home microstep position, each phase current
should reach 70% of ITripMax. If either phase current does
not exceed half of this expected value (more than 35% of
ITripMax) while in the Home microstep position, then a low
load current condition is reported on the next rising edge
of the STEP input. If the measured current in both phases
exceeds 35% of ITripMax) then no fault will be generated on
the next rising edge of the STEP input.
Supply Monitors. External and internal supplies are
monitored to ensure that they are within the correct operat-
ing range. If the main supply exceeds the overvoltage limit,
VOVB, the fault flags are set and the A3980 enters a safety
mode in which all low-side DMOS FETs are enabled and all
high-side DMOS FETs are disabled. This allows the A3980
to survive a load dump transient condition that has up to
50 V on VBATT and a duration of up to 500 ms. If the inter-
nal regulator VREG or the logic supply VDD go below their respec-
tive undervoltage limits (VUVR or VUVD), then: the fault flags are
set, the DMOS outputs are disabled, and the internal logic is reset
to the power-on state (the translator is set to the Home state).
If an open load condition appears while stepping, then it is
detected after the translator cycles through the Home state.
Although the A3980 continues to drive the DMOS outputs
during an open load condition, it does not clear the fault flags
until the next Home state occurs.
There are two conditions that can cause a low load current.
The first is an open circuit on either or both motor phase con-
nections. In this condition, current can never flow through
the phase so a low load current will always be flagged. The
second condition is where the back EMF of the motor limits
the phase current to less than the low load current trip level.
This will happen when the stepper motor is running close to
Diagnostic Fault Flags (FF1, FF2). Diagnostic fault
conditions are reported using the two fault flag outputs.
These are active-low outputs which are coded as shown in
table 2 to discriminate between the fault conditions. When
both fault flags are high, no fault exists.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
13
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
ALLEGRO [ ALLEGRO MICROSYSTEMS ]
