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A3992SLPTR-T 参数 Datasheet PDF下载

A3992SLPTR-T图片预览
型号: A3992SLPTR-T
PDF下载: 下载PDF文件 查看货源
内容描述: DMOS双路全桥式PWM微电机驱动器 [DMOS Dual Full-Bridge Microstepping PWM Motor Driver]
分类和应用: 驱动器运动控制电子器件信号电路光电二极管电动机控制电机
文件页数/大小: 13 页 / 477 K
品牌: ALLEGRO [ ALLEGRO MICROSYSTEMS ]
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A3992
DMOS Dual Full-Bridge Microstepping PWM Motor Driver
Features and Benefits
±1.5 A, 50 V continuous output rating
Low R
DS(on)
DMOS output drivers
Short-to-ground protection
Shorted load protection
Optimized microstepping via six bit linear DACs
Programmable mixed, fast, and slow current decay modes
4 MHz internal oscillator for digital timing
Serial interface controls chip functions
Synchronous rectification for low power dissipation
Internal UVLO and thermal shutdown circuitry
Crossover-current protection
Inputs compatible with 5 or 3.3 V control signals
Sleep and Idle modes
Description
Designed for pulse width modulated (PWM) current control of
bipolar microstepped stepper motors, the A3992 is capable of
continuous output currents to ±1.5 A and operating voltages to
50 V. Internal fixed off-time PWM current control timing circuitry
can be programmed via the serial interface to operate in slow, fast,
or mixed decay modes.
The desired load current level is set via the serial port with two
six bit linear DACs in conjunction with a reference voltage. The
six bits of control allow maximum flexibility in torque control for
a variety of step methods, from microstepping to full step drive.
Load current is set in 1.56% increments of the maximum value.
Synchronous rectification circuitry allows the load current to flow
through the low R
DS(on)
of the DMOS output driver during current
decay. This feature eliminates the need for external clamp diodes
in most applications, saving cost and external component count,
while minimizing power dissipation.
Internal circuit protection includes short-to-ground, shorted load,
thermal shutdown with hysteresis, and crossover current protection.
Special power up sequencing is not required.
The A3992 is supplied in a thin profile (1.2 mm maximum height)
24 pin TSSOP (suffix LP) with exposed thermal pad and a 24 pin
plastic DIP with dual copper batwing tabs (suffix B). The exposed
thermal pad on the LP is at ground potential and needs no electrical
isolation. Both packages are lead (Pb) free with 100% matte tin
leadframe plating.
Packages
24 pin batwing DIP (suffix B) and 24 pin TSSOP with
exposed thermal pad (suffix LP)
LP package approximate scale
Typical Application
0.22
μF
VREG
10
μF
5 kΩ
Microcontroller or
Controller Logic
ROSC
CLOCK
DATA
STROBE
REF
SLEEP
VDD
0.22
μF
CP1
CP2
VCP
0.22
μF
VBB1
A3992
VBB2
OUT1A
OUT1B
SENSE1
100
μF
0.1
μF
OUT2A
OUT2B
SENSE2
0.1
μF
3992DS