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• Organization:512K words × 8 bits
• Industrial and commercial temperature
• Sector architecture
- Eight 64K byte sectors
- Erase any combination of sectors or full chip
• Single 5.0±0.5V power supply for read/write operations
• Sector protection
• High speed 55/70/90/120/150 ns address access time
• Automated on-chip programming algorithm
- Automatically programs/verifies data at specified
address
• Automated on-chip erase algorithm
- Automatically preprograms/erases chip or specified
sectors
• 10,000 write/erase cycle endurance
• Low power consumption
- 30 mA maximum read current
- 60 mA maximum program current
- 400 µA typical standby current
• JEDEC standard software, packages and pinouts
- 32-pin TSOP
- 32-pin PLCC
• Detection of program/erase cycle completion
- DQ7 DATA polling
- DQ6 toggle bit
• Erase suspend/resume
- Supports reading data from or programming data to
a sector not being erased
• Low V
CC
write lock-out below 2.8V
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V
CC
V
SS
Sector protect
switches
Erase voltage
generator
Program/erase
control
Command
register
CE
OE
Program voltage
generator
Chip enable
Output enable
Logic
STB
Data latch
DQ0–DQ7
3LQ#DUUDQJHPHQW
A11
A9
A8
A13
A14
A17
WE
V
CC
A18
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
V
SS
DQ2
DQ1
DQ0
A0
A1
A2
A3
A7
A6
A5
A4
A3
A2
A1
Input/output
buffers
AS29F040
WE
32-pin PLCC
A12
A15
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
DQ1
DQ2
V
SS
DQ3
DQ4
DQ5
DQ6
3
2
A16
A18
1
V
CC
WE
32 31 30
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE
A10
CE
DQ7
A17
32-pin TSOP
Y gating
V
CC
detector
Timer
Address latch
STB
Y decoder
AS29F040
X decoder
Cell matr
A0
DQ0
A0–A18
6HOHFWLRQ#JXLGH
AS29F040-55
Maximum access time
Maximum chip enable access time
Maximum output enable access time
t
AA
55
t
CE
55
t
OE
25
AS29F040-70
70
70
30
AS29F040-90
90
90
35
AS29F040-120 AS29F040-150 Unit
120
120
50
150
150
55
ns
ns
ns
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ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
