AS7C1024B
®
Read cycle (over the operating range)
3,9,12
-10
Parameter
Read cycle time
Address access time
Chip enable (CE1) access time
Chip enable (CE2) access time
Output enable (OE) access time
t
RC
t
AA
t
ACE1
t
ACE2
t
OE
10
-
-
-
-
3
3
3
-
-
0
–
0
–
-
10
10
10
5
-
-
-
4
4
-
4
-
10
12
–
–
–
–
3
3
3
–
–
0
–
0
–
-12
–
12
12
12
6
–
–
–
5
5
–
5
–
12
15
–
–
–
–
3
3
3
–
–
0
–
0
–
-15
–
15
15
15
7
–
–
–
6
6
–
6
–
15
20
–
–
–
–
3
3
3
–
–
0
–
0
–
-20
Notes
3
3, 12
3, 12
5
4, 5, 12
4, 5, 12
4, 5, 12
4, 5, 12
4, 5
4, 5
4, 5, 12
4, 5, 12
–
20
20
20
8
–
–
–
7
7
–
7
–
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Symbol Min Max Min Max Min Max Min Max Unit
Output hold from address change t
OH
CE1 Low to output in low Z
t
CLZ1
CE2 High to output in low Z
CE1 Low to output in high Z
CE2 Low to output in high Z
OE Low to output in low Z
OE High to output in high Z
Power up time
Power down time
t
CLZ2
t
CHZ1
t
CHZ2
t
OLZ
t
OHZ
t
PU
t
PD
Key to switching waveforms
Rising input
Falling input
Undefined / don’t care
Read waveform 1 (address controlled)
3,6,7,9,12
t
RC
Address
D
OUT
t
AA
Data valid
t
OH
Read waveform 2 (CE1, CE2, and OE controlled)
3,6,8,9,12
CE1
CE2
OE
D
OUT
Current
supply
t
ACE1
,
tACE2
t
CLZ1
, t
CLZ2
t
PU
Data valid
t
PD
50%
50%
I
CC
I
SB
t
OE
t
OLZ
t
OHZ
t
CHZ1
, t
CHZ2
t
RC1
3/26/04, v 1.2
Alliance Semiconductor
P. 4 of 9