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AS7C31025A-12TJC 参数 Datasheet PDF下载

AS7C31025A-12TJC图片预览
型号: AS7C31025A-12TJC
PDF下载: 下载PDF文件 查看货源
内容描述: 5V / 3.3V 128K ×8 CMOS SRAM (革命引出线) [5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)]
分类和应用: 静态存储器
文件页数/大小: 8 页 / 117 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
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®
AS7C1025A
AS7C31025A
Write cycle (over the operating range)
11
-10
Parameter
Write cycle time
Chip enable (CE) to write end
Address setup to write end
Address setup time
Write pulse width
Address hold from end of write
Data valid to write end
Data hold time
Write enable to output in high Z
Output active from write end
Symbol
t
WC
t
CW
t
AW
t
AS
t
WP
t
AH
t
DW
t
DH
t
WZ
t
OW
1
Min
10
8
8
0
7
0
5
0
6
12
10
9
0
8
0
6
0
1
-12
Max
6
15
12
10
0
9
0
8
0
1
-15
Min
Max
6
20
12
12
0
12
0
10
0
2
-20
Min
Max
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4, 5
4, 5
4, 5
Notes
Max Min
Write waveform 1 (WE controlled)
10,11
t
WC
t
AW
Address
t
WP
WE
t
AS
D
IN
t
WZ
D
OUT
t
DW
Data valid
t
OW
t
DH
t
AH
Write waveform 2 (CE controlled)
10,11
t
AW
Address
t
AS
CE
t
WP
WE
t
WZ
D
IN
D
OUT
t
DW
Data valid
t
DH
t
CW
t
WC
t
AH
2/6/01; V.0.9
Alliance Semiconductor
P. 5 of 8