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AS7C31025A-15JC 参数 Datasheet PDF下载

AS7C31025A-15JC图片预览
型号: AS7C31025A-15JC
PDF下载: 下载PDF文件 查看货源
内容描述: 5V / 3.3V 128K ×8 CMOS SRAM (革命引出线) [5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)]
分类和应用: 静态存储器
文件页数/大小: 8 页 / 117 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
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®
AS7C1025A
AS7C31025A
Read cycle (over the operating range)
3,9
-10
Parameter
Read cycle time
Address access time
Chip enable (CE) access time
Output enable (OE) access time
Output hold from address change
CE
Low t
o output in low Z
CE Low to output in high Z
OE Low to output in low Z
OE High to output in high Z
Power up time
Power down time
Symbol
t
RC
t
AA
t
ACE
t
OE
t
OH
t
CLZ
t
CHZ
t
OLZ
t
OHZ
t
PU
t
PD
10
2
0
0
0
10
10
3
3
3
10
12
3
0
0
0
-12
12
12
3
3
3
12
15
3
0
0
0
-15
15
15
4
4
4
15
20
3
0
0
0
-20
Min
Max
20
20
5
5
5
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
3
3
Notes
Min Max Min
Max Min Max
Key to switching waveforms
Rising input
Falling input
Undefined/don’t care
Read waveform 1 (address controlled)
3,6,7,9
t
RC
Address
t
AA
D
OUT
Data valid
t
OH
Read waveform 2 (CE and OE controlled)
3,6,8,9
CE
t
OE
OE
D
OUT
Supply
current
t
PU
t
ACE
t
CLZ
50%
Data valid
t
PD
50%
I
CC
I
SB
t
OLZ
t
OHZ
t
CHZ
t
RC1
2/6/01; V.0.9
Alliance Semiconductor
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