AS7C34096A
®
Write cycle (over the operating range)
10
Parameter
Write cycle time
Chip enable (CE) to write end
Address setup to write end
Address setup time
Write pulse width (OE = high)
Write pulse width (OE = low
Address hold from end of write
Write recovery time
Data valid to write end
Data hold time
Write enable to output in high Z
Output active from write end
–10
Symbol Min
Max
t
WC
t
CW
t
AW
t
AS
t
WP1
t
WP2
t
AH
t
WR
t
DW
t
DH
t
WZ
t
OW
10
7
7
0
7
10
0
0
5
0
0
3
–
–
–
–
–
–
–
–
–
–
5
–
–12
Min
Max
12
8
8
0
8
12
0
0
6
0
0
3
–
–
–
–
–
–
–
–
–
–
6
–
–15
Min
Max
15
10
10
0
10
15
0
0
7
0
0
3
–
–
–
–
–
–
–
–
–
–
7
–
–20
Min
Max
20
12
12
0
12
20
0
0
9
0
0
3
–
–
–
–
–
–
–
–
–
–
9
–
Unit Notes
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4, 5
4, 5
4, 5
Write waveform 1 (WE controlled)
10
t
WC
t
AW
Address
t
WP
WE
t
AS
D
IN
t
WZ
D
OUT
t
DW
Data valid
t
OW
t
DH
t
WR
t
AH
8/17/04, v. 2.1
Alliance Semiconductor
P. 5 of 9
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
