AS7C4096
AS7C34096
®
Read cycle (over the operating range)3,9
–10
–12
–15
–20
Symbo
l
Parameter
Read cycle time
Min
10
–
Max
–
Min
12
–
Max
–
Min
15
–
Max
–
Min
20
–
Max Unit Notes
t
–
20
20
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RC
AA
Address access time
t
10
10
5
12
12
6
15
15
7
3
3
Chip enable (CE) access time
Output enable (OE) access time
Output hold from address change
CE Low to output in low Z
CE High to output in high Z
OE Low to output in low Z
OE High to output in high Z
Power up time
t
–
–
–
–
ACE
t
–
–
–
–
OE
OH
t
3
–
3
–
3
–
3
–
5
t
3
–
3
–
0
–
0
–
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
CLZ
t
–
5
–
6
–
7
–
9
CHZ
t
0
–
0
–
0
–
0
–
OLZ
OHZ
t
–
5
–
6
–
7
–
9
t
t
0
–
0
–
0
–
0
–
PU
PD
Power down time
–
10
–
12
–
15
–
20
Key to switching waveforms
Rising input
Falling input
Undefined/don’t care
Read waveform 1 (address controlled)3,6,7,9
tRC
Address
tAA
tOH
DOUT
Data valid
Read waveform 2 (CE, OE controlled)3,6,8,9
tRC1
CE
tOE
OE
tOLZ
tOHZ
tCHZ
tACE
DOUT
Data valid
tCLZ
tPD
50%
ICC
ISB
tPU
Supply
current
50%
1/13/05; v.1.9
Alliance Semiconductor
P. 4 of 9