AS7C3513B
®
AC test conditions
-
-
-
-
Output load: see Figure B.
Input pulse level: GND to 3.0V. See Figure A.
Input rise and fall times: 2 ns. See Figure A.
Input and output timing reference levels: 1.5V.
Thevenin equivalent:
168
Ω
D
out
+1.728V
+3.3V
320
Ω
+3.0V
GND
90%
10%
2 ns
90%
10%
D
out
350
Ω
C
13
Figure A: Input pulse
GND
Figure B: 3.3V Output load
Notes
1
2
3
4
5
6
7
8
9
10
11
12
13
During V
CC
power-up, a pull-up resistor to V
CC
on CE is required to meet I
SB
specification.
This parameter is sampled, but not 100% tested.
For test conditions, see
AC Test Conditions,
Figures A and B.
These parameters are specified with C
L
= 5pF, as in Figure B. Transition is measured
±500mV
from steady-state voltage.
This parameter is guaranteed, but not 100% tested.
WE is High for read cycle.
CE and OE are Low for read cycle.
Address valid prior to or coincident with CE transition Low.
All read cycle timings are referenced from the last valid address to the first transitioning address.
Not applicable.
All write cycle timings are referenced from the last valid address to the first transitioning address.
Not applicable.
C=30pF, except on High Z and Low Z parameters, where C=5pF.
3/24/04, v.1.2
Alliance Semiconductor
P. 7 of 10
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
