AS7C4096A
®
Read cycle (over the operating range)
2,8
Parameter
Read cycle time
Address access time
Chip enable (CE) access time
Output enable (OE) access time
Output hold from address change
CE Low to output in low Z
CE High to output in high Z
OE Low to output in low Z
OE High to output in high Z
Power up time
Power down time
Symbol
t
RC
t
AA
t
ACE
t
OE
t
OH
t
CLZ
t
CHZ
t
OLZ
t
OHZ
t
PU
t
PD
–10
Min
Max
10
–
–
–
3
3
–
0
–
0
–
–
10
10
5
–
–
5
–
5
–
10
–12
Min
Max
12
–
–
–
3
3
–
0
–
0
–
–
12
12
6
–
–
6
–
6
–
12
–15
Min
Max
15
–
–
–
3
3
–
0
–
0
–
–
15
15
6
–
–
7
–
7
–
15
–20
Min
Max
20
–
–
–
3
3
–
0
–
0
–
–
20
20
6
–
–
9
–
9
–
20
Unit Notes
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
3,4
3,4
3,4
3,4
3,4
3,4
2
2
Key to switching waveforms
Rising input
Falling input
Undefined/don’t care
Read waveform 1 (address controlled)
2,5,6,8
t
RC
Address
t
AA
D
OUT
Data valid
t
OH
Read waveform 2 (CE, OE controlled)
2,5,7,8
t
RC1
CE
t
OE
OE
t
OLZ
t
ACE
D
OUT
t
CLZ
Supply
current
t
PU
50%
Data valid
t
PD
50%
I
CC
I
SB
t
OHZ
t
CHZ
5/27/05, v. 1.1
Alliance Semiconductor
P. 4 of 10