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AS7C513B-15JC 参数 Datasheet PDF下载

AS7C513B-15JC图片预览
型号: AS7C513B-15JC
PDF下载: 下载PDF文件 查看货源
内容描述: 5V 32K ×16的CMOS SRAM [5V 32K x 16 CMOS SRAM]
分类和应用: 静态存储器
文件页数/大小: 9 页 / 215 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
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March 2004
AS7C513B
®
5V 32K×16 CMOS SRAM
Features
• Industrial and commercial temperature
• Organization: 32,768 words × 16 bits
• Center power and ground pins
• High speed
• 10/12/15/20 ns address access time
• 5, 6, 7, 8 ns output enable access time
• Low power consumption: ACTIVE
• 605mW / max @ 10 ns
• Low power consumption: STANDBY
• 55 mW / max CMOS I/O
• 6T 0.18u CMOS Technology
• Easy memory expansion with CE, OE inputs
• TTL-compatible, three-state I/O
• 44-pin JEDEC standard package
• 400 mil SOJ
• 400 mil TSOP 2
• ESD protection > 2000 volts
• Latch-up current > 200 mA
Logic block diagram
A0
A2
A3
A4
A5
A6
A7
I/O0–I/O7
I/O8–I/O15
Pin arrangement
V
CC
44-Pin SOJ, TSOP 2 (400 mil)
NC
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
V
CC
GND
I/O4
I/O5
I/O6
I/O7
WE
A14
A13
A12
A11
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A4
A5
A6
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
CC
I/O11
I/O10
I/O9
I/O8
NC
A7
A8
A9
A10
NC
Row decoder
A1
32K × 16
Array
GND
I/O
buffer
Control circuit
Column decoder
A8
A9
A10
A12
A13
A14
A11
WE
UB
OE
LB
CE
Selection guide
-10
Maximum address access time
Maximum output enable access time
Maximum operating current
Maximum CMOS standby current
-12
12
6
100
10
-15
15
7
90
10
AS7C513B
-20
20
8
80
10
Unit
ns
ns
mA
mA
10
5
110
10
3/26/04, v.1.3
Alliance Semiconductor
P. 1 of 9
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