RUBICON-48
OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC
Product Brief
Part Number S4815PBI, Revision 2.2, May 2006
FEATURES
Easy software migration from industry leading AMCC
NIAGARA FEC device
• Significant reuse of the Niagara register map in Rubicon.
• Superb migration path to lower power Rubicon-48 device.
Industry Standard RS(255,239)
Forward Error Correction
with
6.2 dB Coding Gain
(at 10
-15
CER)
• G.709 Compliant Frame Structure.
• Compatible with AMCC’s S19203 (HUDSON) and S19208
(NIAGARA).
• Limited backwards compatibility with AMCC’s S3062.
Backwards compatible with AMCC’s industry leading
S3062 FEC device
• FEC and Framing compatible between Rubicon-48 and S3062.
• Superb migration path to better integration Rubicon-48 device.
Enhanced Gain Forward Error Correction with G.709 ODU
• 2.7 Gbps enhanced FEC with > 8.6 dB coding gain.
• G.709 overhead processing and nominal rate expansion.
• Comprehensive channel statistics gathering including.
• Corrected bits, bytes.
• Corrected zeros, ones (with outputs).
• Uncorrectable sub-frame count.
G.709 ODU - 1 Synchronous and Asynchronous mapping
• 1 x OC – 48/STM-16 synchronous and asynchronous mapping
(239,238).
G.709 Overhead processing
• Bi-directional add-drop ODU – 1.
• Bi-direction G.709 Overhead Processing for bi-directional
OTU1 regeneration.
• Dedicated GCC ports.
Broad Interface Compatibility
• 16-bit 155Mbps LVDS interface
• 4-bit 622Mbps LVDS interface
• Compatible with AMCC’s DANUBE, MISSOURI, OHIO,
RHINE, VOLTA, S3465, S3457, S3455, S3086 and S3485.
• Provides port swapping and output dual feed features for 1 + 1
line protection scheme.
Ingress and Egress SONET/SDH Performance Monitoring/
Injection
• 1 x OC-/48/12/3 TOH add-drop and processing.
• 8B/10B Monitoring.
• SONET/SDH section and line termination including full B2
recalculation.
• TOH add-drop port.
• LOS, OOF, LOF detection.
• B1, B2 monitoring with programmable Signal Degrade and Sig-
nal Fail thresholds.
• J0 Monitoring, SDH and SONET modes.
• Support for Protection Switching.
• K1, K2 monitoring for APS changes, line AIS and line RDI.
• Automatic, interrupt-driven, or manual AIS insertion.
• Frame boundary output.
Support For System Test and Diagnostics
• Can synthesize SONET frames.
• Error injection capability for verification of remote error report-
ing.
• Test-set compliant pseudo-random sequence generation/anal-
ysis.
• Client and Line side loopback.
General Purpose Processor Interface
• Glueless 16-bit interface to MPC860, 25 MHz to 66 MHz. Dual
mode interface also supports Intel processors.
• Interrupt driven or Polled mode operation.
Figure 1: Block Diagram
I n g r e s s /E g r e s s
O D U -1 O H
A d d /D r o p
In g r e s s E g r e s s
S O N E T /S D H
T O H A d d /D r o p
O T N N e tw o r k /L in e
In te r fa c e
OC48/STM-16 or 1 x OTU1 or 1 x ODU1
S F I-4 ( 2 .7
G bps)
C lie n t o r O T N
In te r fa c e
OC-48/STM-16 or 1 x OTU1 or 1 x ODU1
ODU-1 Demap
P a tte rn
EFEC
& E rr
D ecoder
A n a ly s is
BYPASS
BYPASS
PN gen
EFEC
E rr In s E n c o d e r
AIS
PM
R -S
PN gen
FEC
E rr In s
E ncoder
BYPASS
BYPASS
R -S
P a tte rn
FEC
& E rr
D e c o d e r n a ly s is
A
BYPASS
BYPASS
ODU-1 Map
AIS
PM
R e g i s t e Irn t e r r u p t
M a p C o n tro l
1
8 6o r 1 6
u P I/F
AIS
AIS
S F I- 4
(2 .7 G b p s )
FINAL Information
- The information contained in this document is
about a product that has been fully tested, characterized, and is pro-
duction release. All features described herein are supported. Contact
AMCC for updates to this document and the latest product status.
Empowering Intelligent Optical Networks
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
