AC CHARACTERISTICS
Parameter Symbols
JEDEC
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
Standard
t
ACC
t
CE
t
OE
t
DF
(Note 2)
Description
Address to Output Delay
Chip Enable to Output Delay
Output Enable to Output
Delay
Chip Enable High or Output
Enable High to Output High Z,
Whichever Occurs First
Output Hold Time from
Addresses, CE# or OE#,
Whichever Occurs First
Test Setup
CE#,
Max
OE# = V
IL
OE# = V
IL
Max
CE# = V
IL
Max
-45
45
45
30
-55
55
55
35
-70
70
70
40
Am27C128
-90 -120 -150 -200 -255 Unit
90
90
40
120
120
50
150
150
50
200
200
50
250
250
50
ns
ns
ns
Max
25
25
25
25
30
30
30
30
ns
t
AXQX
t
OH
Min
0
0
0
0
0
0
0
0
ns
Caution:
Do not remove the device from (or insert it into) a socket or board that has V
PP
or V
CC
applied.
Notes:
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. This parameter is sampled and not 100% tested.
3. Switching characteristics are over operating range, unless otherwise specified.
4. See Figure 3 and Table 1 for test specifications.
SWITCHING WAVEFORMS
2.4
Addresses
0.45
CE#
t
CE
OE#
t
OE
High Z
t
ACC
(Note 1)
t
OH
Valid Output
High Z
11420E-9
2.0
0.8
Addresses Valid
2.0
0.8
t
DF
(Note 2)
Output
Notes:
1. OE# may be delayed up to t
ACC
– t
OE
after the falling edge of the addresses without impact on t
ACC
.
2. t
DF
is specified from OE# or CE#, whichever occurs first.
PACKAGE CAPACITANCE
Parameter
Symbol
C
IN
C
OUT
Parameter
Description
Input Capacitance
Output Capacitance
CDV028
Test Conditions
V
IN
= 0
V
OUT
= 0
Typ
8
11
Max
10
14
PL 032
Typ
6
8
Max
10
12
PD 028
Typ
5
8
Max
10
10
Unit
pF
pF
Notes:
1. This parameter is only sampled and not 100% tested.
2. T
A
= +25
°
C, f = 1 MHz.
10
Am27C128