mon connection to all devices in the array and
connected to the READ line from the system control
bus. This assures that all deselected memory devices
are in their low-power standby mode and that the out-
put pins are only active when data is desired from a
particular memory device.
these transient current peaks is dependent on the out-
put capacitance loading of the device. At a minimum, a
0.1 µF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and VSS to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM ar-
rays, a 4.7 µF bulk electrolytic capacitor should be used
between VCC and VSS for each eight devices. The loca-
tion of the capacitor should be close to where the
power supply is connected to the array.
System Applications
During the switch between active and standby condi-
tions, transient current peaks are produced on the ris-
ing and falling edges of Chip Enable. The magnitude of
MODE SELECT TABLE
Mode
CE#
OE#/V
A0
X
A9
X
Outputs
PP
Read
V
V
D
OUT
IL
IL
Output Disable
Standby (TTL)
Standby (CMOS)
Program
X
V
X
X
High Z
High Z
High Z
IH
V
X
X
X
IH
V
± 0.3 V
X
X
X
CC
V
V
V
X
X
D
IN
IL
IL
IH
PP
Program Verify
Program Inhibit
V
X
X
D
OUT
IL
V
V
X
X
High Z
01h
PP
Manufacturer Code
Device Code
V
V
V
V
V
V
IL
IL
IL
IL
IL
H
H
Autoselect
(Note 3)
V
V
91h
IH
Notes:
1. V = 12.0 V ± 0.5 V.
H
2. X = Either V or V .
IH
IL
3. A1–A8 and A10–15 = V
IL
4. See DC Programming Characteristics for V voltage during programming.
PP
6
Am27C512
AMD [ AMD ]
