D A T A
outputs are placed in the high impedance state, inde-
pendent of the OE# input.
The device enters the CMOS standby mode when the
CE# pin is held at V
CC
±
0.5 V. (Note that this is a more
restricted voltage range than V
IH
.) The device enters
the TTL standby mode when CE# is held at V
IH
. The
device requires the standard access time (t
CE
) before it
is ready to read data.
S H E E T
If the device is deselected during erasure or program-
ming, the device draws active current until the
operation is completed.
I
CC3
in the DC Characteristics tables represents the
standby current specification.
Output Disable Mode
When the OE# input is at V
IH
, output from the device is
disabled. The output pins are placed in the high imped-
ance state.
Table 2.
Sector
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
A18
0
0
0
0
1
1
1
1
Sector Addresses Table
A16
0
1
0
1
0
1
0
1
Address Range
00000h–0FFFFh
10000h–1FFFFh
20000h–2FFFFh
30000h–3FFFFh
40000h–4FFFFh
50000h–5FFFFh
60000h–6FFFFh
70000h–7FFFFh
A17
0
0
1
1
0
0
1
1
Note:
All sectors are 64 Kbytes in size.
8
Am29F040B
21445E5 November 1, 2006
AMD [ ADVANCED MICRO DEVICES ]
