11. Tested with 0
Ω
source impedance. 2 MΩ is specified for system design purposes only.
12. Group delay can be reduced considerably by using a Z
T
network such as that shown in Note 10 above. The network reduces
the group delay to less than 2
µs.
The effect of group delay on linecard performance may be compensated for by using
QSLAC™ or DSLAC™ devices.
Table 1. SLIC Decoding
DET Output (E0 = 1*)
State
0
1
2
3
4
5
6
7
C3 C2 C1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
1
1
0
1
0
1
0
1
Two-Wire Status
Open Circuit
Ringing
Active
On-hook TX (OHT)
Tip Open
Reserved
Active Polarity Reversal
OHT Polarity Reversal
E1 = 0
Ring trip
Ring trip
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
E1 = 1
Ring trip
Ring trip
Ground key
Ground key
—
—
Ground key
Ground key
Note:
* For the Am79534 and Am79535, a logic Low on E0 disables the DET output into the open-collector state.
12
Am7953X Data Sheet
AMD [ ADVANCED MICRO DEVICES ]
