FINAL
Am79C30A/32A
Digital Subscriber Controller™ (DSC™) Circuit
DISTINCTIVE CHARACTERISTICS
s
Combines CCITT I.430 S/T-Interface Transceiver,
D-Channel LAPD Processor, Audio
s
Processor (DSC device only), and IOM-2
Interface in a single chip
s
Special operating modes allow realization of
CCITT I.430 power-compliant terminal
equipment
s
S- or T-Interface Transceiver
— Level 1 Physical Layer Controller
— Supports point-to-point, short and extended
passive bus configurations
— Provides multiframe support
s
Certified protocol software support available
s
CMOS technology, TTL compatible
s
D-channel processing capability
— Flag generation/detection
— CRC generation/checking
— Zero insertion/deletion
— Four 2-byte address detectors
— 32-byte receive and 16-byte transmit FIFOs
BLOCK DIAGRAM
SBP/IOM-2 Interface
CAP1
CAP2
SBIN
SCLK BCL/CH2STRB*
SBIOUT
SFS
HSW
AINA
AREF
AINB
EAR1
EAR2
LS1
LS2
Audio Interface
Main Audio
Processor (MAP)
(Am79C30A
Only)
Peripheral Port
(PP)
S/T Line
Interface Unit
(LIU)
D
Channel
B1
LOUT1
LOUT2
LIN1
LIN2
Bd Be Bf
Ba
B-channel Multiplexer
(MUX)
B2
D-Channel Data
Link Controller
(DLC)
XTAL1
XTAL2
MCLK
Oscillator
(OSC)
Bb
Bc
D
Channel
CS
WR
RD
Microprocessor Interface
(MUX)
RESET
D7 D6 D5 D4 D3 D2 D1 D0 INT A2
Microprocessor Interface
A1 A0
09893H-1
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 09893 Rev: H Amendment/0
Issue Date: December 1998
S/T Interface