AME, Inc.
AME8570
n
Timing Diagram
V
Release
V
TH
µProcessor
Supervisory
V
IN
T
D2
50%
RESET
T
D1
50%
T
D2
50%
RESETB
T
D1
50%
n
Applications Information
Supply Transients
These devices have a certain immunity to fast negative
going transients. In the following pages the graph titled
"Glitch Rejection" indicates the maximum allowable glitch
amplitude and duration to avoid triggering an unintended
reset. As shown in the graph shorter transients can have
larger amplitudes without triggering resets.
Glitch Rejection
140
120
600
550
500
Reset Time vs. Temperature
Glitch Duration (µS)
100
80
60
40
20
0
0.01
0.1
1
Reset Time (ms)
450
400
350
300
250
200
150
-45 -35 -25 -15 -5
5
15
25
35
45
55
65
75
85
95 105 115
Glitch Amplitude (V)
Temperature (
o
C)
8
Rev. A.01