AMIS-30600 LIN Transceiver
Data Sheet
For fail safe reasons the AMIS-30600 already has an internal pull up resistor of 30kΩ implemented. To achieve the required
timings for the dominant to recessive transition of the bus signal an additional external termination resistor of 1kΩ is required. It is
recommended to place this resistor in the master node. To avoid reverse currents from the bus line into the battery supply line in
case of an unpowered node, it is recommended to place a diode in series to the external pull up. For small systems (low bus
capacitance) the EMC performance of the system is supported by an additional capacitor of at least 1nF in the master node (see
Figure 2, Typical Application Diagram).
The AMIS-30600 has a slope which depends of the supply Vbat. This implementation guarantees biggest slope-time under all load
conditions. The rising slope has to be slower then the external RC-time-constant, otherwise the slope will be terminated by the RC-
time-constant and no longer by the internal slope-control. This would effect the symmetry of the bus-signal and would limit the
maximum allowed bus-speed.
A capacitor of 10µF at the supply voltage input VB buffers the input voltage. In combination with the required reverse polarity diode
this prevents the device from detecting power down conditions in case of negative transients on the supply line.
In order to reduce the current consumption, the AMIS-30600 offers a sleep operation mode. This mode is selected by switching the
enable input EN low (see Figure 4, State Diagram).
In the sleep mode a voltage regulator can be controlled via the INH output in order to minimize the current consumption of the
whole application. A wake-up caused by a message on the communication bus automatically enables the voltage regulator by
switching the INH output high. In case the voltage regulator control input is not connected to INH output or the micro-controller is
active respectively, the AMIS-30600 can be set in normal operation mode without a wake-up via the communication bus.
6.0 Electrical Characteristics
6.1 Absolute Maximum Ratings
Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit.
Table 4: Absolute Maximum Ratings
Symbol
Parameter
V
CC
V
BB
V
LIN
V
INH
V
TxD
V
RxD
V
EN
V
esd(LIN)
V
esd
V
tran(LIN)
V
tran(VBB)
T
amb
Notes:
1.
2.
3.
4.
Conditions
Min.
Max.
Unit
Supply voltage
Battery supply voltage
DC voltage at pin LIN
DC voltage at pin INH
DC voltage at pin TxD
DC voltage at pin RxD
DC voltage at pin EN
Electrostatic discharge voltage at LIN pin
Electrostatic discharge voltage at all other pins
Transient voltage at pin LIN
Transient voltage at pin VBB
Ambient temperature
0 < V
CC
< 5.50V; note 1
0 < V
CC
< 5.50V
0 < V
CC
< 5.50V
0 < V
CC
< 5.50V
0 < V
CC
< 5.50V
Note 2
Note 2
Note 3
Note 4
-0.3
-0.3
-40
-0.3
-0.3
-0.3
-0.3
-4
-4
-150
-150
-40
+7
+40
+40
V
BB
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
+4
+4
+150
+150
+150
V
V
V
V
V
V
V
kV
kV
V
V
°C
80V version available, contact sales for details.
Standardized human body model system ESD pulses in accordance to IEC 1000.4.2.
Applied transient waveforms in accordance with “ISO 7637 parts 1 & 3” capacitive coupled test pulses 1 (-100V),
2 (+100V), 3a (-150V), and 3b (+150V). See Figure 8.
Applied transient waveforms in accordance with “ISO 7637 parts 1 & 3” direct coupled test pulses 1 (-100V), 2 (+75V),
3a (-150V), 3b (+150V), and 5 (+80V). See Figure 8.
AMI Semiconductor
– Rev. 2.0, Apr. 2005
www.amis.com
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