AMIS-40616
LIN Transceiver with 5V Voltage Regulator
6.0 Typical Application
6.1 Application Schematic
Data Sheet
The EMC immunity of the master-mode device can be further enhanced by adding a capacitor between the LIN output and ground. The
optimum value of this capacitor is determined by the length and capacitance of the LIN bus, the number and capacitance of slave
devices, the pull-up resistance of all devices (master & slave), and the required time constant of the system, respectively.
V
cc
voltage must be properly stabilized by external capacitors: capacitor of min. 80nF (ESR<10mΩ) in parallel with a capacitor of min.
8µF (ESR<1Ω).
VBAT
10 uF 100nF
V
BB
11
1
14
Master Node
10 uF 100nF
V
CC
13
Slave Node
VBAT
10 uF 100nF
V
BB
11
1
14
10 uF 100nF
V
CC
13
INH
1 nF 1 kΩ
V
CC
RxD
TxD
EN
STB
GND
V
CC
RxD
TxD
EN
STB
GND
LIN
WAKE
10nF
WAKE
GND
5
GND
10nF
10
7 3 4 11 8
WAKE
GND
220pF
LIN
2
AMIS-
12
40616
9
Micro
controller
LIN
LIN
2
AMIS-
12
40616
9
10
7 3 4 11 8
Micro
controller
WAKE
5
GND
KL30
LIN-BUS
KL31
Figure 2: Typical Application Diagram
6.2 Pin Description
6.2.1. Pin Out (top view)
V
BB
LIN
GND
GND
WAKE
INH
OTP_ZAP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
PC20060426.1
V
CC
RxD
TxD
GND
STB
EN
TEST
Figure 3: Pin Configuration
AMIS-
40616
AMI Semiconductor
– January 2007, M-20545-001
4
www.amis.com
AMI [ AMI SEMICONDUCTOR ]
