AMI Semiconductor, Inc.
WRITE Status Register Instruction (WRSR)
N64S0818HDA/N64S0830HDA
Advance Information
This instruction provides the ability to write the status register and select among several operating modes.
Several of the register bits must be set to a low ‘0’ if any of the other bits are written. The timing sequence
to write to the status register is shown below, followed by the organization of the status register.
WRITE Status Register Sequence
CS
SCK
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Instruction
SI
0
0
0
0
0
0
0
1
7
6
Status Register Data In
5
4
3
2
1
0
SO
High-Z
Status Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mode
0 0 = Word Mode
(Default)
1 0 = Page Mode
0 1 = Burst Mode
1 1 = Reserved
Reserved
Must = 0
Reserved
Must = 0
Hold Function
0 = Hold (Default)
1 = No Hold
11
This is a developmental specification and is subject to change without notice.
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