A23L9308 Series
Timing Waveforms
Propagation Delay from Address (CE/ CE = Active, OE/ OE = Active)
t
CYC
ADDRESS
INPUTS
VALID
t
AA
t
OH
DATA OUT
VALID
Propagation Delay from Chip Enable or Output Enable (Address Valid)
CHIP
ENABLE
VALID
t
ACE
OUTPUT
ENABLE
VALID
t
AOE
t
HZ
t
LZ
DATA OUT
t
LZ
VALID
AC Test Conditions
Applied Voltage
Input Pulse Levels
Input Rise and Fall Time
Timing Measurement Reference Level
Output Load
2.7V~3.6V
0.4V to 2.4V
10 ns
V
IN
= 1.5V
V
OUT
= 1.5V
1 TTL gate and C
L
= 100pF
PRELIMINARY
(October, 2001, Version 0.0)
6
AMIC Technology, Inc.