A25L20P/A25L10P/A25L05P Series
Block Diagram
HOLD
W
S
C
DIO
DO
I/O Shift Register
Control Logic
High Voltage
Generator
Address register
and Counter
256 Byte
Data Buffer
Status
Register
3FFFh (2M),
1FFFh (1M),
FFFh (512K)
Y Decoder
Size of the
read-only
memory area
000FFh
00000h
256 Byte (Page Size)
X Decoder
Pin Descriptions
Pin No.
Description
Logic Symbol
V
CC
C
DIO
DO
Serial Clock
Serial Data Input
1
Serial Data Output
2
Chip Select
Write Protect
Hold
Supply Voltage
Ground
DIO
C
S
W
HOLD
DO
A25L20P/
A25L10P/
A25L05P
S
W
HOLD
V
CC
V
SS
V
SS
Notes:
1. The DIO is also used as an output pin when the Fast
Read Dual Output instruction and the Fast Read Dual
Input-Output instruction are executed.
2. The DO is also used as an input pin when the Fast
Read Dual Input-Output instruction is executed.
(August, 2007, Version 1.0)
2
AMIC Technology Corp.