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A25L40PUM-UF 参数 Datasheet PDF下载

A25L40PUM-UF图片预览
型号: A25L40PUM-UF
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位,低电压,串行闪存的85MHz SPI总线接口 [4 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface]
分类和应用: 闪存
文件页数/大小: 38 页 / 474 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A25L40P Series  
Write Enable (WREN)  
The Write Enable (WREN) instruction (Figure 4.) sets the  
Write Enable Latch (WEL) bit.  
The Write Enable Latch (WEL) bit must be set prior to every  
Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and  
Write Status Register (WRSR) instruction.  
The Write Enable (WREN) instruction is entered by driving  
Chip Select ( ) Low, sending the instruction code, and then  
S
driving Chip Select ( ) High.  
S
Figure 4. Write Enable (WREN) Instruction Sequence  
S
0
1
2
3
4
5
6
7
C
D
Instruction  
High Impedance  
Q
Write Disable (WRDI)  
Power-up  
The Write Disable (WRDI) instruction (Figure 5.) resets the  
Write Disable (WRDI) instruction completion  
Write Status Register (WRSR) instruction completion  
Page Program (PP) instruction completion  
Sector Erase (SE) instruction completion  
Bulk Erase (BE) instruction completion  
Write Enable Latch (WEL) bit.  
The Write Disable (WRDI) instruction is entered by driving Chip  
S
Select ( ) Low, sending the instruction code, and then driving  
Chip The Write Enable Latch (WEL) bit is reset under the  
following conditions:  
Figure 5. Write Disable (WRDI) Instruction Sequence  
S
0
1
2
3
4
5
6
7
C
D
Instruction  
High Impedance  
Q
PRELIMINARY (May, 2007, Version 0.4)  
10  
AMIC Technology Corp.