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A29800UV-70 参数 Datasheet PDF下载

A29800UV-70图片预览
型号: A29800UV-70
PDF下载: 下载PDF文件 查看货源
内容描述: 1024K ×8位/ 512K ×16位CMOS 5.0伏只,引导扇区闪存 [1024K X 8 Bit / 512K X 16 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 34 页 / 515 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A29800 Series
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hardware
sector unprotection feature re-enables both program and
erase operations in previously protected sectors.
Sector protection/unprotection must be implemented using
programming equipment. The procedure requires a high
voltage (V
ID
) on address pin A9 and the control pins.
The device is shipped with all sectors unprotected.
It is possible to determine whether a sector is protected or
unprotected. See "Autoselect Mode" for details.
Temporary Sector Unprotect
This feature allows temporary unprotection of previous
protected sectors to change data in-system. The Sector
Unprotect mode is activated by setting the RESET pin to
V
ID
. During this mode, formerly protected sectors can be
programmed or erased by selecting the sector addresses.
Once V
ID
is removed from the RESET pin, all the previously
protected sectors are protected again. Figure 1 shows the
algorithm, and the Temporary Sector Unprotect diagram
shows the timing waveforms, for this feature.
START
Hardware Data Protection
The requirement of command unlocking sequence for
programming or erasing provides data protection against
inadvertent writes (refer to the Command Definitions table).
In addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
V
CC
power-up transitions, or from system noise. The device
is powered up to read array data to avoid accidentally writing
data to the array.
RESET = V
ID
(Note 1)
Write Pulse "Glitch" Protection
Noise pulses of less than 5ns (typical) on
OE
,
CE
or
WE
do not initiate a write cycle.
Perform Erase or
Program Operations
Logical Inhibit
Write cycles are inhibited by holding any one of
OE
=V
IL
,
CE
= V
IH
or
WE
= V
IH
. To initiate a write cycle,
CE
and
RESET = V
IH
WE
must be a logical zero while
OE
is a logical one.
Power-Up Write Inhibit
If
WE
=
CE
= V
IL
and
OE
= V
IH
during power up, the
device does not accept commands on the rising edge of
WE
. The internal state machine is automatically reset to
reading array data on the initial power-up.
Temporary Sector
Unprotect
Completed (Note 2)
Notes:
1. All protected sectors unprotected.
2. All previously protected sectors are protected once again.
Figure 1. Temporary Sector Unprotect Operation
PRELIMINARY
(May, 2001, Version 0.0)
9
AMIC Technology, Inc.