A416316B Series
Selection Guide
Symbol
t
RAC
t
AA
t
CAC
t
OEA
t
RC
t
PC
I
CC1
I
CC6
Description
Maximum
RAS
Access Time
Maximum Column Address Access Time
Maximum
CAS
Access Time
Maximum Output Enable (
OE
) Access Time
Minimum Read or Write Cycle Time
Minimum Fast Page Mode Cycle Time
Maximum Operating Current
Maximum CMOS Standby Current
-30
30
16
10
10
65
19
95
2
-35
35
18
11
11
70
21
85
2
-40
40
20
12
12
75
23
75
2
Unit
ns
ns
ns
ns
ns
ns
mA
mA
Functional Description
The A416316B is a high performance CMOS Dynamic
Random Access Memory organized as 65,536 words X
16 bits. The A416316B is fabricated with advanced
CMOS technology and designed with innovative design
techniques resulting in high speed, extremely low power
and wide operating margins at component and system
levels.
The A416316B features a high speed page mode
operation in which high speed read, write and read-write
are performed on any of the bits defined by the column
address. The asynchronous column address uses an
extremely short row address capture time to ease the
system level timing constraints associated with
multiplexed addressing. Output is tri-stated by a column
address strobe (
UCAS
and
LCAS
) which acts as an
output enable independent of
RAS
. Very fast
UCAS
and
LCAS
to output access time eases system design.
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 256 X 16 bits
within a page, with cycle time as short as 19/21/23 ns.
The A416316B is best suited for graphics, digital signal
processing and high performance peripherals.
The A416316B is available in JEDEC standard 40-pin
plastic SOJ package and 40/44 TSOP type II package.
PRELIMINARY
(November, 2000, Version 0.0)
2
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
