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A42L0616V-50U 参数 Datasheet PDF下载

A42L0616V-50U图片预览
型号: A42L0616V-50U
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16的CMOS动态的, EDO页模式内存 [1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE]
分类和应用:
文件页数/大小: 25 页 / 273 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A42L0616 Series
Preliminary
Features
n
Organization: 1,048,576 words X 16 bits
n
Part Identification
- A42L0616 (1K Ref.)
n
Single 3.3V power supply/built-in VBB generator
n
Low power consumption
- Operating: 110mA (-45 max)
-
Standby: 1.5mA (TTL), 1.0mA (CMOS)
1.0mA (Self-refresh current)
n
High speed
- 45/50 ns RAS access time
- 20/22 ns column address access time
-
12/13 ns CAS access time
-
18/20 ns EDO Page Mode Cycle Time
n
Industrial operating temperature range: -40°C to 85°C
for -U
n
Fast Page Mode with Extended Data Out
n
Separate
CAS
(
UCAS
,
LCAS
) for byte selection
n
1K Refresh Cycle in 16ms
n
Read-modify-write, RAS -only, CAS -before- RAS ,
Hidden refresh capability
n
TTL-compatible, three-state I/O
n
JEDEC standard packages
-
400mil, 42-pin SOJ
-
400mil, 50/44 TSOP type II package
1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE
General Description
The A42L0616 is a new generation randomly accessed
memory for graphics, organized in a 1,048,576-word by
16-bit configuration. This product can execute Byte Write
and Byte Read operation via two
CAS
pins.
The A42L0616 offers an accelerated Fast Page Mode
This allow random access of up to 1024 words within a
row at a 56/50 MHz EDO cycle, making the A42L0616
ideally suited for graphics, digital signal processing and
high performance computing systems.
Pin Descriptions
Symbol
Description
Address Inputs
Data Input/Output
Row Address Strobe
Column Address Strobe for Lower Byte
(I/O
0
– I/O
7
)
Column Address Strobe for Upper Byte
(I/O
8
– I/O
15
)
WE
OE
VCC
VSS
NC
Write Enable
Output Enable
3.3V Power Supply
Ground
No Connection
Pin Configuration
n
SOJ
VCC
I/O
0
I/O
1
I/O
2
I/O
3
VCC
I/O
4
I/O
5
I/O
6
I/O
7
NC
NC
WE
RAS
NC
NC
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
VSS
I/O
15
I/O
14
I/O
13
I/O
12
VSS
I/O
11
I/O
10
I/O
9
I/O
8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
VSS
n
TSOP
VCC
I/O
0
I/O
1
I/O
2
I/O
3
VCC
I/O
4
I/O
5
I/O
6
I/O
7
NC
NC
NC
WE
RAS
NC
NC
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
VSS
I/O
15
I/O
14
I/O
13
I/O
12
VSS
I/O
11
I/O
10
I/O
9
I/O
8
NC
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
VSS
A0 – A9
I/O
0
- I/O
15
RAS
LCAS
UCAS
cycle with a feature called Extended Data Out (EDO).
PRELIMINARY
A42L0616S
A42L0616V
(June, 2002, Version 0.2)
1
AMIC Technology, Inc.