LP62S16256E-I Series
Block Diagram
A0
VCC
GND
512 X 8192
DECODER
A16
MEMORY ARRAY
A17
I/O
1
COLUMN I/O
INPUT
DATA
CIRCUIT
I/O
9
INPUT
DATA
CIRCUIT
I/O
8
I/O
16
CE
LB
HB
OE
WE
CONTROL
CIRCUIT
Pin Descriptions -- TSOP
Pin No.
1 - 5, 18 - 27,
42 - 44
6
7 - 10, 13 - 16,
29 - 32, 35 - 38
17
39
40
41
11, 33
12, 34
28
Symbol
A0 - A17
CE
I/O
1
- I/O
16
WE
LB
HB
OE
VCC
GND
NC
Description
Address Inputs
Chip Enable Input
Data Inputs/Outputs
Write Enable Input
Lower Byte Enable Input (I/O
1
to I/O
8
)
Higher Byte Enable Input (I/O
9
to I/O
16
)
Output Enable Input
Power
Ground
No Connection
(January, 2002, Version 2.0)
2
AMIC Technology, Inc.