32-Bit PCI “MatchMaker”
February 12, 1997 Revised October 1998
S5933
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EATURES
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PCI 2.1 Compliant Master/Slave Device
Full 132 Mbytes/sec Transfer Rate
PCI Bus Operation DC to 33 Mhz
8/16/32 Bit Add-On User Bus
Four Definable Pass-Thru Regions
Two 32 Byte FIFOs
Sync/Async Add-On Bus Operation
Mail Box Registers w/Byte Level Status
Direct Mail Box Data Strobe/Interrupts
Big/Little Endian Conversions
Direct PCI & Add-On Interrupt Pins
Boot Loading from nvRAM or Byte Wide
Optional Expansion BIOS/POST Code
160 Pin PQFP
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PPLICATIONS
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High Speed Networking
Digital Video Applications
I/O Communications Ports
High Speed Data Input/Output
Multimedia Communications
Memory Interfaces
High Speed Data Acquisition
Data Encryption/Decryption
Intel i960 Interface
General Purpose PCI Interfacing
D
ESCRIPTION
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing
system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places
them closer to the system’s processor bus, providing faster data transfer between the processor and peripherals. The PCI
Local bus also addresses the industry’s need for a standard that is not directly dependent on the speed, size and type of
processor bus. It represents the first microprocessor independent bus offering performance more than adequate for the
most demanding applications, such as full-motion video.
Applied Micro Circuits Corporation (AMCC), the premier supplier of single chip solutions, has developed and pro-
duced the S5933 to solve the problem of interfacing applications to the PCI Local bus. The S5933, or ‘Matchmaker’, is
a powerful and flexible PCI controller supporting several levels of interface sophistication. At the lowest level, it can
serve simply as a PCI bus Target with modest transfer requirements. For high-performance applications, the S5933 can
become a Bus Master to attain the PCI Local bus peak transfer capability of 132 MBytes/sec.
The MatchMaker is an off-the-shelf, low-cost, standard product, which is PCI 2.1 compliant. And, since AMCC is a
member of the PCI Special Interest Group, the S5933 has been tested in "compliance workshops" along with other man-
ufacturer's PCI systems, chip sets and BIOSs. This removes the burden of compliance testing from the designer and thus
significantly reduces development time. Utilizing the S5933 allows the designer to focus on the actual application, not
debugging the PCI interface.
The MatchMaker allows special direct data accessing between the PCI bus and the user application through implemen-
tation of four definable Pass-Thru data channels. Each data channel is implemented by defining a Host memory segment
size and 8/16/32-bit user bus width. The addition of two 32 byte FIFOs, also used in S5933 Bus Mastering applications,
provides further versatility to data transfer capabilities. FIFO DMA transfers are supported using Address and Transfer
Count Registers. Four 32-bit Mailbox Registers coupled with a Status Register and extensive interrupt capabilities pro-
vide flexible user command or message transfers between the two buses. In addition, the S5933 also allows use of an
external serial, or byte-wide non-volatile memory to perform any pre-boot initialization requirements and to provide
custom expansion BIOS or POST code capability.
6290 Sequence Drive, San Diego, California 92121-4358
800-755-2622 Fax: 619-450-9885
http://www.amcc.com
AMICC [ AMIC TECHNOLOGY ]
