data sheet
Features:
LAMINATE
•
•
•
•
•
•
•
•
Up to 176 ball count
7-12 mm body size
Thinnest CSP available at 0.5 mm max mounted height
JEDEC Level 1 Reliability to 260 °C reflow temperature
Conventional process flow with proven wirebond technology
Standardized footprints at 0.5 mm pitch
Package stacking potential of tested packages
Two stacked die potential
etCSP
®
et
CSP
®
Package:
Amkor's
etCSP
®
package is the first ball grid array
capable of an extremely thin 0.5 mm maximum
mounted height. This package can squeeze into
applications requiring a thin form factor. The
etCSP
®
package is constructed using conventional
IC processing including standard wire bonding,
molding and substrate infrastructure. The resulting
package consists of one or two peripheral rows of
0.3 mm diameter solder balls to allow common
SMT processing.
There are many advantages as a direct result of the
unique
et
CSP
®
design. One key advantage is the
0.5 mm mounted height of the package, the result of
solder ball diameter and thin core laminate substrate.
Every other aspect of the package, die, wires and
moldcap are within the dimensions of the substrate
and solderballs. Another direct result of the
etCSP
®
design is the superior moisture resistance. Since
die attach materials are not used to mount the
die, there is reduced capability to trap moisture.
Therefore, popcorn induced delamination is reduced.
The
etCSP
®
package can also be designed with the
capability of stacking completely tested packages,
i.e., packaged memory, into a single footprint on the
motherboard. In this manner, two stacked
etCSP™
packages can be tested before mounting and the
combined height is less than 1.0 mm.
Thermal Performance:
12 x 12 mm body; 176 I/O; Typical 39 °C/W
Amkor’s initial
etCSP
®
packages are offered for low power
applications. Higher thermal performance can be achieved by
adding a heat spreader or heat sink to the die's exposed
backside. In addition, future die-up configurations will provide
a direct heat dissipation path into the product motherboard
through the die backside.
Electrical:
Inductance (nH)
Capacitance (pF)
Resistance (mOhms)
Min
0.735
0.176
47.9
Max
1.546
0.319
89.83
Package Dimensions:
7 x 7 mm body; 89 I/O; 0.3 mm ball diameter; 100 MHz
Package Level*:
• Moisture sensitivity JEDEC Level 1 @ 260 °C
• Temp Cycle
-55° C/+125 °C, 1000 cycles
• Temp/Humidity
85 °C/ 85% RH, 1000 hrs
• High Temp Storage 150 °C, 1000 hrs
• PCT/HAST
130 °C, 85% RH, 96 hrs
*Data for 12 x 12 mm body; 176 I/O; 7.62 mm DC die,
0.15 mm thick
Board Level:
• Thermal cycle
-55 °C / 125 °C 2 cycles / hour,
1000 cycles
• First failure 1100 cycles
• Lead free solder
Reliability:
Applications:
Amkor's
et
CSP
®
design makes this package type ideal for PCMCIA card applications, mini disk
drives, thin wireless handsets, Flash or EEPROM memory and other portable products where vertical
height is limited. Because of the unique design of the
etCSP
®
package, stacking is easily achieved
with proper substrate designs. This creates an opportunity to multiply memory capacity without
increasing board area.
VISIT AMKOR TECHNOLOGY ONLINE FOR LOCATIONS AND
TO VIEW THE MOST CURRENT PRODUCT INFORMATION
.
www.amkor.com
DS578F
Rev Date: 07’03
AMKOR [ AMKOR TECHNOLOGY ]
