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PSVFBGA 参数 Datasheet PDF下载

PSVFBGA图片预览
型号: PSVFBGA
PDF下载: 下载PDF文件 查看货源
内容描述: 层叠封装(POP)系列 [Package on Package (PoP) Family]
分类和应用:
文件页数/大小: 2 页 / 246 K
品牌: AMKOR [ AMKOR TECHNOLOGY ]
 浏览型号PSVFBGA的Datasheet PDF文件第2页  
data sheet
Package Stackable Very Thin Fine
Pitch BGA (PSvfBGA):
Features:
LAMINATE
Package on Package (PoP) Family
PSvfBGA
After 3 years of development in package stacking technology and infra-
structure, Amkor launched the multiple award winning PSvfBGA (base
PoP) platform during the 4th quarter of 2004. The next two years saw
many new milestones, from publication of JEDEC mechanical and elec-
trical standards to a range of new customers and applications adopting
PoP. By the end of 2006 PSvfBGA became the fastest growing new
product in Amkor's history, reflecting the broad industry benefits of PoP
and Amkor's leadership position. The next few years promise to provide
many new challenges and applications for PoP, as handheld multimedia
applications continue to demand higher processing power and memory
storage capacities. Amkor is committed to maintain strong development
and production capabilities to ensure we are forefront in meeting next
generation PoP requirements.
Amkor has expanded our comprehensive PoP family and aligned the
roadmap across the supply chain to ensure that PoP will continue to
scale with the industry's miniaturization, higher density and perform-
ance enhancement requirements.
In 2006 Amkor's PoP family ramped products with 2 die stacked in the
PSvfBGA platform. Stacking multiple die in the bottom package allows
customers to increase performance and provide further system miniatur-
ization by combining analog+digital or logic+memory devices.
• 10-15 mm body sizes tooled per product table. Additional
sizes based on demand
• Top package I/O interface 0.65 mm pitch accommodating 104
to 160 pin counts
• High I/O 0.50 mm pitch interface is qualified
• Fine pitch 0.50 mm bottom package footprints with 0.40 mm
pitch in qualification
• Established package on package infrastructure (over 5 years of
development with leading OEM, EMS and equipment providers)
• Wafer thinning / handling < 100
µ
m
• Consistent product performance and reliability
• Package configurations compliant with JEDEC standards
• Package pre-stacking support and services available based
on demand
• Bottom PSvfBGA and top FBGA / Stacked CSP packages
are well established in high volume production
• Stacked package heights of 1.2 mm to 1.6 mm available
in a variety of configurations. (See Stack Up table below)
Amkor assures reliable performance by continuously
monitoring key indices:
Package Level:
• Moisture Resistance Testing JEDEC Level 3 @260 °C x 4 reflows
• Additional Test Data at [(30 °C/85%RH/96hrs)+
260]x3 or x4
• Package dimensions 14 x 14 mm, 352 I/O
• Temp Cycle
-55/+125 °C, 1000 cycles
• Temp/Humidity
85 °C/85%RH/1000 hours
• High Temp Storage
150 °C, 1000 hours
• HAST
130 °C, 85% RH, 96 hours
Board Level:
-40/+125 °C, 1000 cycles
• Thermal Cycle
Reliability:
Applications:
PoP packages are designed for products requiring efficient memory
architectures including multiple buses and increased memory density &
performance, while reducing mounted area. Portable electronic products
such as mobile phones (baseband or applications processor+combo
memory), digital cameras (image processor+memory), PDAs, portable
players (audio / graphics processor+memory), gaming and other
mobile applications can benefit from the combination of stacked pack-
age and small footprint offered by Amkor's industry leading PoP family.
Broad Benefits as an Enabling
Technology:
PoP Overall Stack Up Table
PoP offers OEMs and EMS providers a platform to cost effectively expand
options for logic+memory 3D integration with the following benefits:
• Greatly expands device options by simplifying the business logistics
of stacking
• Integration controlled at the system level to best match stacked
combinations with system requirements
• JEDEC standards ensure broad component availability
• Improving time to market and sourcing flexibility
• Eliminates margin stacking and expands technology reuse
• Helps manage the huge cost impacts associated with increasing
demand for multi-media processing and memory
• Logic device transitions to flip chip in the bottom package enables
further PoP size and height reductions
Symbol
A1 (mounted, 0.5 pitch)
A2 (4L laminate)
B1 (stacked, 0.65 pitch), single die
B2 (stacked, 0.65 pitch), 2+0 die
B3 (2L laminate)
B4 (mold cap)
Overall Pkg height
Unit
mm
mm
mm
mm
mm
mm
mm
FBGA + PSvfBGA
Min
Max
0.160
0.260
0.260
0.340
0.270
0.330
0.320
0.380
0.100
0.160
0.370
0.430
1.310
1.470
Nom
0.210
0.300
0.300
0.350
0.130
0.400
1.400
VISIT AMKOR TECHNOLOGY ONLINE FOR LOCATIONS AND
TO VIEW THE MOST CURRENT PRODUCT INFORMATION
.
www.amkor.com
DS586C
Rev Date: 03’07