AMS73CAG01808RA
Mode Register MR3
The Mode Register MR3 controls Multi Purpose Registers (MPR). The Mode Register 3 is written by assert-
ing low on CS, RAS, CAS, WE, high on BA1 and BA0, and low on BA2 while controlling the states of
address pins according to the table below.
BA
2
BA
1
BA0
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Address Field
0*
1
1
1
0*
1
MPR
MPR Loc
Mode Register 3
BA1
0
0
1
1
BA0
0
1
0
1
MRS mode
MR0
MR1
MR2
MR3
MPR Operation
A2
0
1
MPR
Normal operation*
3
Dataflow from MPR
MPR Address
A1
0
0
1
1
A0
0
1
0
1
MPR location
Predefined pattern*
2
RFU
RFU
RFU
* 1 : BA2, A3 - A13 are reserved for future use (RFU) and must be programmed to 0 during MRS.
* 2 : The predefined pattern will be used for read synchronization.
* 3 : When MPR control is set for normal operation, MR3 A[2] = 0, MR3 A[1:0] will be ignored
AMS73CAG01808RA
Rev. 1.0 December 2010
10
AMS [ Advanced Monolithic Systems Ltd ]
