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AS1105WL-T 参数 Datasheet PDF下载

AS1105WL-T图片预览
型号: AS1105WL-T
PDF下载: 下载PDF文件 查看货源
内容描述: 串行接口, 4位LED驱动器 [Serially Interfaced, 4-Digit LED Driver]
分类和应用: 驱动器
文件页数/大小: 15 页 / 554 K
品牌: AMSCO [ AUSTRIAMICROSYSTEMS AG ]
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AS1105
Data Sheet - D e t a i l e d D e s c r i p t i o n
Initial Power-Up
After powering up the system, all register are reset, so that the display is blank. The AS1105 starts the shutdown mode.
All registers should be programmed for normal operation. The default settings enable only scan of one digit, the
internal decoder is disabled, data register and intensity register are set to the minimum value.
Decode-Mode Register
In the AS1105, a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code
consists of the numbers 0-9, E,H, L,P and -. In register 09h, a logic high enables the decoder for the appropriate digit.
In case that the decoder is bypassed (logic low), the data Bits D7-D0 correspond to the segment lines of the AS1105.
In
some possible settings for register 09h are shown. Bit D7, which corresponds to the decimal point, is not
affected by the settings of the decoder. Logic high means that the decimal point is displayed. In
the font of the
Code B decoder is shown. In
the correspondence of the register to the appropriate segments of a 7 segment
display is shown
Intensity Control and Interdigit Blanking
Brightness of the display can be controlled in an analog way by changing the external resistor (R
SET
). The current,
which flows between V
DD
and I
SET
, defines the current that flows through the LEDs. The LED current is 100 times the
I
SET
current. The minimum value of R
SET
should be 9.53kΩ, which corresponds to 40mA segment current. The
brightness of the display can also be controlled digitally via register 0Ah. The brightness can be programmed in 16
steps and is shown in
An internal pulse width modulator controls the intensity of the display.
Scan-Limit Register
The scan limit register 0Bh selects the number of digits displayed. When all 4 digits are displayed the update frequency
is typically 800Hz. If the number of digits displayed is reduced, the update frequency is reduced as well. The frequency
can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits influences the
brightness, the resistor R
SET
should be adjusted accordingly.
shows the maximum allowed current, when
fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be used to blank
portions of the display (leading zeros).
Table 5. Register Address Map
Register
No-Op
Digit 0
Digit 1
Digit 2
Digit 3
Decode Mode
Intensity
Scan Limit
Shutdown
Not used
Reset and ext. Clock
Display Test
Register
D15-D12
X
X
X
X
X
X
X
X
X
X
X
X
D11
0
0
0
0
0
1
1
1
1
1
1
1
D10
0
0
0
0
1
0
0
0
1
1
1
1
D9
0
0
1
1
0
0
1
1
0
0
1
1
D8
0
1
0
1
0
1
0
1
0
1
0
1
Hex Code
0xX0
0xX1
0xX2
0xX3
0xX4
0xX9
0xXA
0xXB
0xXC
0xXD
0xXE
0xXF
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Revision 1.34
7 - 15