AS1322
Data Sheet
- Detailed Description
Low-Noise Fixed-Frequency Operation
Oscillator
The AS1322 switching frequency is internally fixed at 1.2MHz allowing the use of very small external components.
Error Amplifier
The integrated error amplifier is an internally compensated trans-conductance (g
m
) type (current output). The internal
1.23V reference voltage is compared to the voltage at pin FB to generate an error signal at the output of the error
amplifier. A voltage divider from V
OUT
to GND programs the output voltage from 2.5 to 5V via pin FB as:
V
OUT
= 1.23V(1 + (R
1
/R
2
))
(EQ 1)
Current Sensing
A signal representing the internal NMOS-switch current is summed with the slope compensator. The summed signal is
compared to the error amplifier output to provide a peak current control command for the PWM. Peak switch current is
limited to approximately 850mA independent of V
IN
or V
OUT
.
Zero Current Comparator
The zero current comparator monitors the inductor current to the output and shuts off the PMOS synchronous rectifier
once this current drops to 20mA (approx.). This prevents the inductor current from reversing polarity and results in
improved converter efficiency at light loads.
Anti-Ringing Control
Anti-ringing control circuitry prevents high-frequency ringing on pin SW as the inductor current approaches zero. This
is accomplished by damping the resonant circuit formed by the inductor and the capacitance on pin SW (C
SW
).
Powersave Operation (AS1322A)
In light load conditions, the integrated powersave feature removes power from all circuitry not required to monitor
V
OUT
. When V
OUT
has dropped approximately 1% from nominal, the AS1322A powers up and begins normal PWM
operation.
C
OUT
recharges, causing the AS1322A to re-enter powersave mode as long as the output
load remains below the powersave threshold. The frequency of this intermittent PWM is proportional to load current;
i.e., as the load current drops further below the powersave threshold, the AS1322A turns on less frequently. When the
load current increases above the powersave threshold, the AS1322A will resume continuous, seamless PWM opera-
tion.
Notes:
1. An optional capacitor (C
FF
) between pins V
OUT
and FB in some applications can reduce V
OUTp-p
ripple and input
quiescent current during powersave mode. Typical values for C
FF
range from 15 to 220pF.
2. In powersave mode the AS1322A draws only 30µA from the output capacitor(s), greatly improving converter effi-
ciency.
Shutdown
When pin SHDNN is low the AS1322 is switched off and <1µA current is drawn from battery; when pin SHDNN is high
the device is switched on. If SHDNN is driven from a logic-level output, the logic high-level (on) should be referenced
to V
OUT
to avoid intermittently switching the device on.
Note:
If pin SHDNN is not used, it should be connected directly to pin OUT. V
OUT
is held at approximately V
IN
- 0.6V
during shutdown.
In shutdown the battery input is connected to the output through the inductor and the internal synchronous rectifier P-
FET. Due to the body diode of the internal synchronous rectifier PFET, V
OUT
is held at approximately V
IN
- 0.6V during
shutdown. This allows the input battery to provide backup power for devices such as an idle microcontroller, memory,
or real-time-clock, without the usual diode forward drop. In this way a separate backup battery is not needed.
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