AS1526/AS1527
Data Sheet
- E l e c t r i c a l
Characteristics
Table 3. Electrical Characteristics (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Digital Inputs:
SCLK, SHDNN, CSN
V
IH
V
IL
V
HYST
I
IN
C
IN
V
SH
V
SL
SCLK, CSN Input High Voltage
SCLK, CSN Input Low Voltage
SCLK, CSN Input Hysteresis
SCLK, CSN Input Leakage
SCLK, CSN Input Capacitance
SHDNN Input High Voltage
SHDNN Input Low Voltage
SHDNN Input Current
V
SM
V
FLT
SHDNN Input Mid Voltage
SHDNN Voltage, Floating
SHDNN Max Allowed Leakage,
Mid Input
Digital Output:
DOUT
V
OL
V
OH
I
L
C
OUT
Output Voltage Low
Output Voltage High
Tri-State Leakage Current
Tri-State Output Capacitance
I
SINK
= 5mA
I
SINK
= 16mA
I
SOURCE
= 0.5mA
CSN = V
DD
CSN = V
DD
7
7
0.7x
V
DD
0.3x
V
DD
0.2
V
IN
= 0V or V
DD
±0.01
±1
15
V
DD
-
0.4
0.4
SHDNN = 0V or V
DD
1.1
SHDNN = float
SHDNN = float
V
DD
/2
±50
±4.0
V
DD
-
1.1
V
V
V
µA
pF
V
V
µA
V
V
nA
0.4
0.8
V
DD
-
0.5
±0.01
±10
15
V
V
µA
pF
Power Requirements
V
DD
Supply Voltage
Int. Reference (AS1526), V
DD
= 3.6V
I
DD
Supply Current
External Reference, V
DD
= 3.6V
Shutdown mode, V
DD
= 3.6V
PSR
Power-Supply Rejection
8
2.7
1.4
1.0
0.3
±1
3.6
2.0
1.4
2
V
mA
µA
mV
V
DD
= V
DDMIN
to V
DDMAX
,
full-scale input
1. Tested at V
DD
= +2.7V.
2. Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale
range and offset have been calibrated.
3. Offset nulled.
4. Achievable with standard timing
5. Sample tested at 0.1% AQL.
6. External load should not change during conversion for specified accuracy.
7. Guaranteed by design; not subject to production testing.
8. Measured as [V
FS
(V
DDMIN
) - V
FS
(V
DDMAX
)] with external reference.
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