AP1212
Dual USB High-Side Power Switch
Function Description
Error Flag
An open-drained output of N-channel MOSFET, the
FLG output is pulled low to signal the following fault
conditions: input undervoltage, output current limit,
and thermal shutdown.
Current Limit
The current limit threshold is preset internally. It
protects the output MOSFET switches from
damage due to undesirable short circuit conditions
or excess inrush current often encountered during
hot plug-in. The low limit of the current limit
threshold of the AP1212 allows a minimum current
of 0.5A through the MOSFET switches. A current
limit condition will signal the error flag.
Thermal Shutdown
When the chip temperature exceeds 140ºC for any
reason other than overcurrent fault of either one of
the two MOSFET switches, the thermal shutdown
function turns off both MOSFET switches and
signal the error flag. A hysteresis of 10ºC prevents
the MOSFETs from turning back on until the chip
temperature drops to below 130ºC.
Supply Filtering
A 0.1µF to 1µF bypass capacitor from IN to GND,
located near the device, is strongly recommended
to control supply transients. Without a bypass
capacitor, an output short may cause sufficient
ringing on the input (from supply lead inductance)
to damage internal control circuitry.
Transient Droop Requirements
USB support dynamic attachment (hot plug-in) of
peripherals. A current surge is caused by the input
capacitance of downstream device. Ferrite beads
are recommended in series with all power and
ground connector pins. Ferrite beads reduce EMI
and limit the inrush current during hot-attachment
by filtering high-frequency signals.
Short Circuit Transient
Bulk capacitance provides the short-term transient
current needed during a hot-attachment event. With
a 33µF, 16V tantalum or 100µF, 10V electrolytic
capacitor mounted close to downstream connector
per port should provide transient drop protection.
Printed Circuit Layout
The power circuitry of USB printed circuit boards
requires a customized layout to maximize thermal
dissipation and to minimize voltage drop and EMI.
Marking Information
(Top View)
8
Logo
Part Number
5
Enable Type
H: Active High
L: Active Low
Blank: normal
L: Lead Free Package
ID code: internal
Xth week: 01~52
Year: "01" =2001
"02" =2002
~
AP1212 X
YY WW X X
1
PDIP/SOP
4
Anachip Corp.
www.anachip.com.tw
9/11
Rev.1.0
Sep.23, 2004
ANACHIP [ ANACHIP CORP ]
