Symbol
t
PD
t
OE
t
OD
t
CO1
t
CO2
t
CF
t
SC
t
HC
t
CL
, t
CH
t
CP
f
MAX1
f
MAX2
f
MAX3
t
AW
t
AP
t
AR
t
RESET
Parameter
Input
5
to non-registered output
Input
5
to output enable
6
Input
5
to output disable
6
Clock to Output
Clock to comb. output delay via internal registered feedback
Clock to Feedback
Input
5
or feedback setup to clock
Input
5
hold after clock
Clock low time, clock high time
8
Min clock period Ext (t
SC
+ t
CO1
)
Internal feedback (1/t
SC
+ t
CF
)
11
External feedback (1/t
CP
)
11
No feedback (1/t
CL
+ t
CH
)
11
Asynchronous Reset Pulse Width
Input
5
to Asynchronous Reset
Asynchronous Reset recovery time
Power-on reset time for registers in clear state
12
-25 / I-25
Min
Max
25
25
25
15
35
9
15
0
13
30
41.6
33.3
38.4
25
25
25
5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
µs
Switching Waveforms
Inputs, I/O,
Registered Feedback,
Synchronous Preset
Clock
Asynchronous
Reset
Registered
Outputs
Combinatorial
Outputs
Notes:
1. Minimum DC input is -0.5V, however, inputs may undershoot to -2.0V for peri-
ods less than 20 ns.
2. V
I
and V
O
are not specified for program/verify operation.
3. Test Points for Clock and V
CC
in t
R
and t
F
are referenced at the 10% and 90%
levels.
4. I/O pins are 0V and V
CC
.
5. “Input” refers to an input pin signal.
6. t
OE
is measured from input transition to V
REF
±0.1V,
T
OD
is measured from input transition to V
OH
-0.1V or V
OL
+0.1V; V
REF
=V
L.
7. Capacitances are tested on a sample basis.
8. Test conditions assume: signal transition times of 3ns or less from the 10% and
90% points, timing reference levels of 1.5V (Unless otherwise specified).
9. Test one output at a time for a duration of less than 1 second.
10. I
CC
for a typical application: This parameter is tested with the device pro-
grammed as an 8-bit Counter.
11. Parameters are not 100% tested. Specifications are based on initial character-
ization and are tested after any design process modification that might affect oper-
ational frequency.
12. All input at GND.
Anachip Corp.
www.anachip.com.tw
8/10
Rev. 1.0 Dec 16, 2004
ANACHIP [ ANACHIP CORP ]
