欢迎访问ic37.com |
会员登录 免费注册
发布采购

PEEL22LV10AZP-25 参数 Datasheet PDF下载

PEEL22LV10AZP-25图片预览
型号: PEEL22LV10AZP-25
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS可编程电可擦除逻辑器件 [CMOS Programmable Electrically Erasable Logic Device]
分类和应用: 可编程逻辑器件光电二极管输入元件时钟
文件页数/大小: 10 页 / 683 K
品牌: ANACHIP [ ANACHIP CORP ]
 浏览型号PEEL22LV10AZP-25的Datasheet PDF文件第2页浏览型号PEEL22LV10AZP-25的Datasheet PDF文件第3页浏览型号PEEL22LV10AZP-25的Datasheet PDF文件第4页浏览型号PEEL22LV10AZP-25的Datasheet PDF文件第5页浏览型号PEEL22LV10AZP-25的Datasheet PDF文件第6页浏览型号PEEL22LV10AZP-25的Datasheet PDF文件第7页浏览型号PEEL22LV10AZP-25的Datasheet PDF文件第9页浏览型号PEEL22LV10AZP-25的Datasheet PDF文件第10页  
A.C. Electrical Characteristics
Over the operating range
9
Switching Waveforms
Inputs, I/O,
Registered Feedback,
Synchronous Preset
Clock
Asynchronous
Reset
Registered
Outputs
Combinatorial
Outputs
Notes:
1. Minimum DC input is -0.5V, however, inputs may undershoot to -2.0V for peri-
ods less than 20 ns.
2. V
I
and V
O
are not specified for program/verify operation.
3. The Supply Voltage range of 2.7 to 3.6V was chosen to allow this part to be
used in both 3V ±10% and 3.3V ±10% applications.
4. Test Points for Clock and VCC in t
R
and t
F
are referenced at the 10% and 90%
levels.
5. I/O pins are 0V and V
CC
.
6. “Input” refers to an input pin signal.
7. t
OE
is measured from input transition to V
REF
±0.1V, T
OD
is measured from
input transition to V
OH
-0.1V or V
OL
+0.1V; V
REF
=V
L.
8. Capacitances are tested on a sample basis.
9. Test conditions assume: signal transition times of 3ns or less from the 10% and
90% points, timing reference levels of 1.5V (Unless otherwise specified).
10. Test one output at a time for a duration of less than 1 second.
11. I
CC
for a typical application: This parameter is tested with the device pro-
grammed as a 10-bit Counter.
12. Parameters are not 100% tested. Specifications are based on initial character-
ization and are tested after any design process modification that might affect oper-
ational frequency.
13. t
PD
, t
OE
, t
OD
, t
CO
, t
SC
, and t
AP
are approximately 5 ns. slower on the first
transaction from sleep mode.
14. Input at GND.
Anachip Corp.
www.anachip.com.tw
8/10
Rev. 1.0 Dec 16, 2004