ARA2000
GaAs IC
ATT
IN
(+)
A1
OUT
(+)
A1
IN
(+)
32 dB
16 dB
8 dB
4 dB
2 dB
1 dB
ATT
OUT
(+)
A2
IN
(+)
A2
OUT
(+)
I
SET2
EFET
I
SET1
Vg1
A1
IN
(-)
A1
OUT
(-)
ATT
IN
(-)
EFET
Vg2
A2
OUT
(-)
A2
IN
(-)
ATT
OUT
(-)
32 dB
P5
16 dB
P4
8 dB
P3
4 dB
P2
2 dB
P1
1 dB
P0
Buffer
Clock
Buffer
2
Data
2-Bit Shift
Register/
Address
8
Control Latch
Data Latch
Enable
8
2
8
2-Bit Shift
Register / Die ID
4-Bit Shift
Register / Chip Select
8-Bit Shift Register
Die
Address 0
CMOS IC (Serial to Parallel Interface)
Die
Address 1
Figure 2: Functional Block Diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
V
ATTN
ATT
IN
(+)
A1
OUT
(+)
A1
IN
(+)
Vg1
I
SET1
A1
IN
(-)
A1
OUT
(-)
ATT
IN
(-)
V
CMOS
CLK
DAT
EN
GND
N/C
ATT
OUT
(+)
A2
IN
(+)
A2
OUT
(+)
Vg2
I
SET2
A2
OUT
(-)
A2
IN
(-)
ATT
OUT
(-)
GND
CMOS
N/C
C1
C0
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Figure 3: Pin Out
2
Data Sheet - Rev 2.2
06/2004
ANADIGICS [ ANADIGICS, INC ]
